24Hz to 60Hz PLL?

f d

The 24Hz is square. What would I use for a BP filter at such a LF without having a very large inductor?

Chris

Make that an active filter. Only Rs and Cs, and at that low frequency, any opamp will nicely do.

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Thanks,
Fred.

f d

By dividing in the loop -- you are multiplying by 5. That is what I meant. The sum effect of the dividing is multiplying.

How much jitter would the combo that I put together have? I can accept a lock time of a few cycles, I can accept jitter if it only effects the pulse width and it is not too bad.

As far as the PIC, I have not programmed one before, and I have no clue on where to start. I can do basic, and some bash script, but I have never used anything like assembler. I was hoping to order a few chips from digikey, wire them together, and be done with it. If using a PIC is fairly easy for a n00b, then I would be willing to look into it.

Thanks, Chris

Personally I despise PICs. However PIC became a generic word for any small microcontroller. Once a customer asked me if I work with PIC controllers made by AVR company.

Vladimir Vassilevsky DSP and Mixed Signal Design Consultant

Caution: At such low frequencies, capacitor dissipation can play a critical role in screwing up active filter performance.

Clear back in the early '70's, while designing telephone filters I discovered you can negate dissipation factor by making your integrators such...

Paste rather than just click, Agent doesn't like parentheses in a URL. I don't know about the behavior of other readers. ...Jim Thompson

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If you go to a local univercity library, there is a whole shelf of books on the matter of digital PLLs and phase synchronization. They all talk about essentially the same things and they seem to be retellings of each other. I really can't recommend a particular one.

As for the OP's problem, it is VERY simple.

1. Estimate the phase of 24 Hz from input capture readings.
2. Multiply the phase by 2.5 modulo period.
3. Find the difference between this phase and the phase of 60 Hz.
4. Apply this difference to the frequency of 60 Hz through a filter.

Here we go. Takes 20 lines of code or so.

Vladimir Vassilevsky DSP and Mixed Signal Design Consultant

of

ld

The PIC isn't all that bad. It is just a little weirder than it needed to be. I think part of it is because they did'nt think through the step to the next larger size.

When they designed the assembler for it, they compounded the weirdness. Given what it can do, a assembler that took expressions like:

A +=3D Variable Variable +=3D A

would have made it easier to read.

t of

ould

Well the reason I am straying away from the MCU idea is that I really want to just finish the project. I am doing it in my spare time. If I could program it in about the same amount of time it would take me to put together the aforementioned list of parts, then I am all ears. However, never having messed around with programing a chip before, I am thinking this could take another couple of dozen hours to accomplish the task (factoring in a learning curve).

However, if you guys think that the signal from my design would be too jittery to be useful than I guess I don't have a choice, but to take the MCU route.

Thanks, Chris

Right chip, but the best strategy is to lock a high frequency to a multiple of the 24 Hz, NOT to lock at 12 Hz. The loop filter works better at the highest frequency, and the noise pickup would improve if you went higher than that. Then, divide 240 by 4 to get the 60 Hz, and by five then by two to get the 24 Hz for the phase comparison.

The 'divide by two' on each branch guarantees accurate 50% duty cycle, many counters have asymmetric outputs.

The input only furnishes information 24 times a second (48 if you can use both edges) so it doesn't much matter what the oscillator frequency is. The VCO could be 60KHz and the loop dynamics wouldn't be any better.

Granted, 24 is twice as good as 12. So you could run the VCO at 120, and then divide by 5 to get 24 for the pll, and also divide by 2 to get the 60.

The phase:frequency detector in the 4046 is edge sensitive, so duty cycle doesn't matter if you use that one.

John

John's last paragraph is absolutely correct... Ron Treadway and I designed it to be that way :-P ...Jim Thompson

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| James E.Thompson, CTO                            |    mens     |
| Analog Innovations, Inc.                         |     et      |
| Analog/Mixed-Signal ASIC's and Discrete Systems  |    manus    |
| Phoenix, Arizona  85048    Skype: Contacts Only  |             |
| Voice:(480)460-2350  Fax: Available upon request |  Brass Rat  |
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I love to cook with wine.     Sometimes I even put it in the food.

"Jim Thompson" wrote in message news: snipped-for-privacy@4ax.com...

Really?

I loved the 4046 and used it in several designs.

Bob

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The 4046 is actually a CMOS translation and copy, merging my MC4024 VCM and Ron's and my MC4044 PFD, both done originally in TTL (around

1968). The MC4024 was good up to around 30MHz (it was really PECL with a translator to TTL ;-)

Later there were actual PECL releases: MC1658 VCM, and MC12040 PFD.

Then there's also my MC1648 tank-type VCO... no longer made :-( Though I designed an improved replica on a custom ASIC just this last year.

One of my original OpAmps, the MC1530/31, designed in 1963, is still being manufactured (by Lansdale)... made for 47 years now ;-) ...Jim Thompson

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| James E.Thompson, CTO                            |    mens     |
| Analog Innovations, Inc.                         |     et      |
| Analog/Mixed-Signal ASIC's and Discrete Systems  |    manus    |
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I love to cook with wine.     Sometimes I even put it in the food.

So how come you put that stupid deadband in there? ;)

Cheers

Phil Hobbs

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That's a mismatched delay issue. Later versions have that "fixed" by overlapping the U/D outputs. ...Jim Thompson

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| James E.Thompson, CTO                            |    mens     |
| Analog Innovations, Inc.                         |     et      |
| Analog/Mixed-Signal ASIC's and Discrete Systems  |    manus    |
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I love to cook with wine.     Sometimes I even put it in the food.

Sort of hard to fix when the pulse goes completely away--with a given slew rate, there's some range in which both the height and width of the pulse depend on the phase error--which produces a flat spot in the V(phi) curve. Or do the fixed versions pulse high, pulse low, and then go tri-state at zero phase error? That would still give some ripple, but that's a big improvement over deadbands.

Any part numbers with the fixed version? That caused me grief as a youth, till I realized I could just use a resistor to ground to move the set point a bit away from phi=0.

Thanks

Phil Hobbs

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Dr Philip C D Hobbs
Principal
ElectroOptical Innovations
55 Orchard Rd
Briarcliff Manor NY 10510
845-480-2058
hobbs at electrooptical dot net
http://electrooptical.net

SeaMonkey worked like a champ!

:

put of

would

Since you only need to work over a very narrow range, you can use a crystal in the VCO part of the PLL. If you hunt among the frequencies you can get from digikey, I think you will easily find one that you can pull onto a power of two times 60Hz. A very simple flip-flop based phase detector can get a low jitter correction signal. A slightly more complex on based on some tristating can get you even lower.

Enable the circuit output just before the "expected" rise of the 24Hz Follow the 24Hz input until after the "expected" rise.

The "expected" value is a small number of clock cycles of the crystal. This can either be picked by the designer or learned by the circuit by decrementing the width until it just brackets the rise or incrementing if the rise goes outside the expected band.

This method has the noise rejection characteristics of the XOR method for the case where there is a small noise in the input. It doesn't have a gain change as you go through the perfectly aligned case. This means that you can use a more extreme filter than the flip-flop case normally allows.

The "fixed" version output current pulses of a minimum width.

AFAIK only in custom ASIC's.

...Jim Thompson

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| James E.Thompson, CTO                            |    mens     |
| Analog Innovations, Inc.                         |     et      |
| Analog/Mixed-Signal ASIC's and Discrete Systems  |    manus    |
| Phoenix, Arizona  85048    Skype: Contacts Only  |             |
| Voice:(480)460-2350  Fax: Available upon request |  Brass Rat  |
| E-mail Icon at http://www.analog-innovations.com |    1962     |
             
I love to cook with wine.     Sometimes I even put it in the food.