Any logic-level FETs with breakdown 300V+?

Well, there ain't so much space left as for a carpenter ant to squish in there ;-)

Needs a separate supply and thus even more space. But if all else fails that's what we'll have to do. On another design a month ago I did that but there I had over 200 square inches of free land. So I just stuck a claim somewhere ...

Making a low yield supply on board to drive a fet should be a trivial task, one that requires very little real-estate. The size of gate driver chips are very small these days. One could even plant a mini daughter board just in front/over the top of the FET if space is tight.

Did that the other day btw, to modify a circuit that was already in use.! Needed to enhance a analog PID board, so I etched out a mini .5" square DS board and elevated it over the main board with the connection legs...

In your case, I guess if you wanted to design this into your board you could use a header and simply make the danghter board removable.

You don't need much additional space for this :

| | | | ||-+ |||----+-----||-+ | | --- | --- ||-+ | ||-------+-----||-+ | | === GND

Not so sure that would be safe for the logic level fet.

The Cap can lead ahead causing the HV fet to turn on sooner than the logic fet does. HV could thus damage the logic fet before it gets down in the Ron value.

Also, you have the case where free charge could be on the gate at initial start up, because I don't see a loading R to prevent that.

Oh well, just my observations from the peanut gallery..

The HV fet source is not expected to exceed the HV fet gate voltage; the gate coupling caps are required to be >> greater than Cgs, for basic function.

RL