Noob question about the bitscope schematic

The JFET is a high impedance input stage. This is required on a CRO in
order to get the standard 1Mohm input impedance provided by R26. The
opamp does not have high enough input impedance to do this, if it did,
then yes, you could connect direct to the opamp.

This is a common circuit for CRO front ends. Q3 is usually a resistor
in the basic implementation.
Q3, RV3 and C35 could be removed, but the FETs would have to be be
extremely well matched electrically and thermally to ensure no offset.

Dave :)

I forget to add that, yes Q3 could be replaced by a diode.
But either way I can't see why Q3 is needed, it will in fact add some
temperature dependency to the DC offset, that's bad.
Replacing Q3 with a resistor (the traditional circuit topology) ensures
no temperature related DC offset (assuming RV3 has the same tempco).
But even if they are different tempcos it's probably going to be
negligable. Using Q3 on the other hand will I suspect add quite
substantial DC offset with temperature change.

Dave :)

"David L. Jones"




**  The offset and offset drift are already completely screwed by the use of
1N4148s for D8 and D9 which are NOT  low leakage types.




.......  Phil

"David L. Jones"



**  Dunno what drugs Dave is on  -  or not on -  but the circuit is NOT a
differential pair of FETS so his remarks re offset are irrelevant.

The trim pot merely sets the current flowing through Q7 and hence also Q6.

When that current level is such that the *bias* voltage between the gate and
source of Q6 is *equal* to the Vbe of Q3,  then the output rests at zero
volts.




........   Phil

Phil Allison wrote:


I was referring to the more basic (standard) circuit that has no
resistors (or Q3 for that matter), just the two FETs. In this case the
two FETs must be matched in order not to get any DC offset on the
output.
Adding the resistors (or VR3 + Q3) allows the use of non-matched FETs,
but trimming is required for the DC offset.

Adding the transistor Q3 appears to achieve nothing but give you an
(unwanted) offset variation with temperature. Changing Q3 to a resistor
avoids any variation with temperature.

Dave :)

"David L. Jones"



**  Shame you did not indicate any such thing before.





**  Both are then running with zero GS bias voltage - current level will be
high.






** The Vbe of Q3 ( -2mV per C)  likely acts to oppose offset temperature
drift.



.....  Phil

Shame I did. What part of "Q3, RV3 and C35 could be removed" didn't you
understand?
If you remove those components you have nothing left but the two FETs.



Perhaps that was the intention, but I recon it might cause more DC
offset variation with temp of its own accord.
The two FETs will after all be reasonably matched in that respect.

Dave :)

"David L. Jones"



**  Shame you are such a damn liar  - Dave.





**  Not interested in any of your verbal polys  -   Dave.





** Bullshit you do.

Try learning how to write someday, Dave -  it is *never* too late.

FACT:

YOU  wrote this:

" Q3 is usually a resistor in the basic implementation."

That makes on resistor, at least.

NOW you try to bullshit everyone by saying there are NO resistors in your so
called "basic implementation" ???????????



BTFW

If Q3 is a fixed resistor,  then a second one of similar value one HAS to be
placed in the drain cct of Q7.

That makes TWO resistors as well as matched FETs for zero offset.


Piiisssss off   -  wanker.




.......  Phil

No verbal ploy. I was clearly talking about a two FET circuit without
any resistors. Not my fault if you can't comprehend that.

Sounds like you are the one who is getting tedious again Phil.



I wrote this:
"Q3, RV3 and C35 could be removed, but the FETs would have to be be
extremely well matched electrically and thermally to ensure no offset."

That was a seperate sentence, and clearly meant a circuit with only the
FETs.



You are either confusing the two circuits or just deliberately playing
around to prove I'm wrong in some way - I suspect the later.
I said the circuit with the resistor replacing Q3 is the "basic
implementation", because that is usually the basic practical
implemention. This circuit has two resistors.

The circuit with the two FETs and no resistors I called a "more basic
(standard) circuit ".



Yes it does, I did not say otherwise. I said that Q3 can be replaced by
a resistor, VR3 is still in there. Doing this requires the value to be
trimmed as in the Bitscope design.



As I was trying to point out, you can also get zero offset with *no
resistors*, BUT the two FETs must be an electrically and thermally
matched pair. That is the most basic circuit, but it is not often
implemented in practice. The one with the two resistors is the standard
way to implement this in practice.



Resorted to bad language again I see *sigh*

Of course you can't prove I'm wrong technically so that's what you have
to resort too. Sad.

Dave :)

Hi Dave, You'll have to excuse Phil, It's a full moon
again and everyone at aus.hi-fi has left to move to a
moderated group where He's not allowed. As he's got
nowhere to go he's turned up here to cause trouble.

What?  Her menstrual cycle is in phase (-lock) with the moon?  Awesome.

Heh heh, the term "Lunatic" has a basis in fact.