Hello,
I have 2 boards, of which one has PPC core and other do not.
[board1 /w PPC]-------uart-------[board2 /wo PPC]I want to use UART as a debug interface for board2.
So,I am looking for a UART Master core that shall be Maser on the PLB/ OPB bus that I can use it in board2 FPGA.
The Xilinx EDK library provide UART cores that has PLB/OPB interfaces as core side interfaces. But these interfaces are Slave interface.
Do anyone has UART core (Master on PLB/OPB)? Is it advisable to go for such setup?
Thank you.
Best regards, Muthu