Is it possible to implement Ethernet on bare metal FPGA, Without Use of any Hard or Soft c...

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Hello folks,  

Let's say I have Spartan 6 board only and i wanted to implement Ethernet communication.So how can it be done?

I don't want to connect any Hard or Soft core processor.
also I have looked into WIZnet W5300 Ethernet controller interfacing to spartan 6, but I don't want to connect any such controller just spartan 6.
So how can it be done?

It is not necessary to use spartan 6 board only.If it possible to workout with any another boards I would really like to know. Thanks  

Re: Is it possible to implement Ethernet on bare metal FPGA, Without Use of any Hard or Soft core processor?
On Monday, February 4, 2019 at 1:29:45 AM UTC-5, Swapnil Patil wrote:
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communication.So how can it be done?
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partan 6, but I don't want to connect any such controller just spartan 6.
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 with any another boards I would really like to know. Thanks


You can construct an Ethernet interface easily enough.  I know cores have b
een written for that.  What is hard is implementing the IP stack.  Even on  
a processor this is a lot of work.  Because there are a lot of steps involv
ed and each step is not time critical, it makes much more sense to implemen
t the logic sequentially rather than in FPGA fabric.  Even if implemented i
n the fabric, it will consist of many state machines with lots of timers an
d counters.  

So it is doable, but since there is no reason to do it, no one has... yet.  
 You might want to dig into an implementation rather than the specs.  My un
derstanding is there are a lot of details that aren't so clear in the spec.
  


  Rick C.

  - Tesla referral code - https://ts.la/richard11209

Re: Is it possible to implement Ethernet on bare metal FPGA, Without Use of any Hard or Soft core processor?
On 04/02/2019 06:37, snipped-for-privacy@gmail.com wrote:
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sure they have, I know of 2 companies just in the UK who have done this,  
4links (since 2003) are Argon.

Hans
www.ht-lab.com


You might want to dig into an implementation rather than the specs.  My  
understanding is there are a lot of details that aren't so clear in the  
spec.
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Re: Is it possible to implement Ethernet on bare metal FPGA, Without Use of any Hard or Soft core processor?
On Monday, February 4, 2019 at 3:40:42 AM UTC-5, HT-Lab wrote:
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et communication.So how can it be done?
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o spartan 6, but I don't want to connect any such controller just spartan 6
.
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out with any another boards I would really like to know. Thanks
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ve been written for that.  What is hard is implementing the IP stack.  Even
 on a processor this is a lot of work.  Because there are a lot of steps in
volved and each step is not time critical, it makes much more sense to impl
ement the logic sequentially rather than in FPGA fabric.  Even if implement
ed in the fabric, it will consist of many state machines with lots of timer
s and counters.
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et.  
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I found 4links.  Not sure if Argon is supposed to be another company or not
.  

I guess I'm not sure what you mean when you say, "2 companies"... "have don
e this".  What exactly do you mean by "this"?  


  Rick C.

  + Tesla referral code - https://ts.la/richard11209


Re: Is it possible to implement Ethernet on bare metal FPGA, Without Use of any Hard or Soft core processor?
On 04/02/2019 14:35, snipped-for-privacy@gmail.com wrote:
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I meant to write 4links and Argon. These companies have implemented a  
TCP/IP stack in hardware.

Hans
www.ht-lab.com

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Re: Is it possible to implement Ethernet on bare metal FPGA, Without Use of any Hard or Soft core processor?
On Monday, February 4, 2019 at 10:02:34 AM UTC-5, HT-Lab wrote:
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rnet communication.So how can it be done?
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 to spartan 6, but I don't want to connect any such controller just spartan
 6.
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rkout with any another boards I would really like to know. Thanks
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have been written for that.  What is hard is implementing the IP stack.  Ev
en on a processor this is a lot of work.  Because there are a lot of steps  
involved and each step is not time critical, it makes much more sense to im
plement the logic sequentially rather than in FPGA fabric.  Even if impleme
nted in the fabric, it will consist of many state machines with lots of tim
ers and counters.
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 yet.
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s,
 not.
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 done this".  What exactly do you mean by "this"?
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I didn't find a company Argon, but maybe now that I know they are in the UK
 they might be easier to find.  Tough name to search for.  

How do you know they've implemented a TCP/IP stack in hardware?  Have you u
sed it?  I didn't see anything on the 4links web site.  They seem to be big
 on tools for working with SpaceWire.  


  Rick C.

  -- Tesla referral code - https://ts.la/richard11209

Re: Is it possible to implement Ethernet on bare metal FPGA, Without Use of any Hard or Soft core processor?
On 04/02/2019 15:28, snipped-for-privacy@gmail.com wrote:
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https://www.electronicsweekly.com/news/archived/resources-archived/uk-company-creates-hardware-tcpip-stack-that-runs-in-2003-04/

Hans.
www.ht-lab.com


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Re: Is it possible to implement Ethernet on bare metal FPGA, Without Use of any Hard or Soft core processor?
On Monday, February 4, 2019 at 10:55:55 AM UTC-5, HT-Lab wrote:
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e:
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hernet communication.So how can it be done?
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ng to spartan 6, but I don't want to connect any such controller just spart
an 6.
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workout with any another boards I would really like to know. Thanks
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s have been written for that.  What is hard is implementing the IP stack.  
Even on a processor this is a lot of work.  Because there are a lot of step
s involved and each step is not time critical, it makes much more sense to  
implement the logic sequentially rather than in FPGA fabric.  Even if imple
mented in the fabric, it will consist of many state machines with lots of t
imers and counters.
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.. yet.
his,
or not.
ve done this".  What exactly do you mean by "this"?
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e UK they might be easier to find.  Tough name to search for.
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ou used it?  I didn't see anything on the 4links web site.  They seem to be
 big on tools for working with SpaceWire.
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pany-creates-hardware-tcpip-stack-that-runs-in-2003-04/

I'm surprised, but not amazed.  They said it took up about 2500 FFs and 500
0 4LUTs which is also not surprising.  

I guess the question is "why?"  They say it can be easily verified and "sho
uld be more secure than software".  Maybe I'm confused.  I thought VHDL *wa
s* software?  

I noticed they instantiated the design for a Virtex II fpga.  That is a *ve
ry* old chip.  I wonder if their design has actually sold?  I suppose it's  
not such a far fetched thing once I see the numbers for size.  I expect a l
ogic based stack can be faster than software if you are willing to provide  
the gates.  

I wonder if they have ways of reusing the same hardware for multiple tasks  
while tasks are waiting for timeouts or I/O?  While you can get good throug
hput with hardware, it can be more difficult to handle a lot of different c
onnections.  


  Rick C.

  -+ Tesla referral code - https://ts.la/richard11209

Re: Is it possible to implement Ethernet on bare metal FPGA, Without Use of any Hard or Soft core processor?
On Monday, February 4, 2019 at 12:48:09 PM UTC-5, snipped-for-privacy@gmail.com wrote:
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I'm guessing it was implemented in software.  A tiny, probably
custom, CPU core used to execute the program that handles the
translation for them.

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I would be both surprised and amazed to learn it wasn't done
in software, albeit in hardware.

--  
Rick C. Hodgin

Re: Is it possible to implement Ethernet on bare metal FPGA, Without Use of any Hard or Soft core processor?
On Monday, February 4, 2019 at 12:51:16 PM UTC-5, Rick C. Hodgin wrote:
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Seek and ye shall find.  You obviously haven't been reading the links.  The info was there, you just had to read it.  

I guess you are going to say this was another hostile post aimed at you.  It is aimed at you, but it isn't hostile.  I'm just stating what are pretty clear facts.  


  Rick C.

  +- Tesla referral code - https://ts.la/richard11209


Re: Is it possible to implement Ethernet on bare metal FPGA, Without Use of any Hard or Soft core processor?
On Monday, February 4, 2019 at 1:43:13 PM UTC-5, snipped-for-privacy@gmail.com wrote:
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I did read it.  It says "no processor" but that's different than
having created your own processor in VHDL to conduct the work.
That "no processor" statement could mean there's no ARM CPU or
some other CPU in there doing the work, but rather it is a fully-
VHDL solution that implements its own logic and its own core
processor to conduct the work.

As I say, I would be surprised and amazed to learn it's done in
something other than a custom internal processor, however simple
that design might be.

--  
Rick C. Hodgin

Re: Is it possible to implement Ethernet on bare metal FPGA, Without Use of any Hard or Soft core processor?
On Monday, February 4, 2019 at 2:34:28 PM UTC-5, Rick C. Hodgin wrote:
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Ok, if you refuse to believe English there is nothing I can say.  This does take me back to the campaign of George H W Bush.  "Read my lips."  


  Rick C.

  -+- Tesla referral code - https://ts.la/richard11209

Re: Is it possible to implement Ethernet on bare metal FPGA, Without Use of any Hard or Soft core processor?
On 04/02/2019 19:34, Rick C. Hodgin wrote:
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You are probably right, I suspect these designs use programmable FSM's  
to handle some of the complexity. At what point does one classify a  
programmable FSM or sequencer as an embedded processor?

Hans
www.ht-lab.com


Re: Is it possible to implement Ethernet on bare metal FPGA, Without Use of any Hard or Soft core processor?
On Monday, February 4, 2019 at 3:49:44 PM UTC-5, HT-Lab wrote:
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m wrote:
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:
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  The info was there, you just had to read it.
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A timer would be a FSM, but I would hesitate to call it a CPU.  If someone  
wants to equate a FSM to a CPU then the original point is of no value.  If  
it ain't running a -stored program-, then it qualifies as "no processor" fo
r the purpose of the original claim of being implemented in hardware and no
t software, at least in my book.  


  Rick C.

  +-- Tesla referral code - https://ts.la/richard11209

Re: Is it possible to implement Ethernet on bare metal FPGA, Without Use of any Hard or Soft core processor?
On Monday, February 4, 2019 at 3:58:35 PM UTC-5, snipped-for-privacy@gmail.com wr
ote:
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e wants to equate a FSM to a CPU then the original point is of no value.  I
f it ain't running a -stored program-, then it qualifies as "no processor"  
for the purpose of the original claim of being implemented in hardware and  
not software, at least in my book.  

I could be wrong, but it would make sense there's a tiny CPU in
there that's running a stored program, something that would be
easily changeable and synthesizable.  In addition, they could
test it in emulation using an interpreter before committing to
hardware.

In my opinion, it is only natural to do this.

--  
Rick C. Hodgin

Re: Is it possible to implement Ethernet on bare metal FPGA, Without Use of any Hard or Soft core processor?
On Monday, February 4, 2019 at 4:16:23 PM UTC-5, Rick C. Hodgin wrote:
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wrote:
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s  
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one wants to equate a FSM to a CPU then the original point is of no value.  
 If it ain't running a -stored program-, then it qualifies as "no processor
" for the purpose of the original claim of being implemented in hardware an
d not software, at least in my book.  
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I guess you would think that if you believed everyone were liars.  They sai
d "no processors" and I take them at their word.  What you fail to understa
nd (while that doesn't seem to prevent you from having a strong opinion) is
 that they most likely don't have a stored program processor of any type be
cause that would constitute software and they wish to be able to claim ther
e is "no software" even though HDL is really not much different from softwa
re.  

?Logic these days is written in VHDL rather than schematics, but th
is is the protocol stack written in VHDL with no C and no processor and no  
?hardware compilation? from software,? said Paul Wa
lker, CEO of 4Links.

Can they make it any more clear to you?  Oh, I forgot who I was talking to.
  Once you get an idea in your head it might as well be in mask programmed  
ROM... it ain't changin'.  


  Rick C.

  +-+ Tesla referral code - https://ts.la/richard11209

Re: Is it possible to implement Ethernet on bare metal FPGA, Without Use of any Hard or Soft core processor?
On Monday, February 4, 2019 at 4:24:05 PM UTC-5, snipped-for-privacy@gmail.com wr
ote:
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They didn't say "no software," only this:

    "...but this is the protocol stack written in VHDL with
     no C and no processor and no ?hardware compilation? fr
om
     software..."

They only indicate it's an original VHDL implementation, with no
C, no processor, and no hardware compilation from software, which
I take to mean they don't have a design in some emulator that they
then take and translate into some VHDL synthesized version of their
emulator design, but rather it's all in VHDL.

Now, using logic, nothing in their statement precludes them from
having a non-C-based source code language that runs inside their
proprietary tiny VHDL-only core, one written in VHDL from scratch,
but one which emulates the version they wrote on their workbench
for their emulator.

As I say, it's only natural to do this type of emulation first,
and then do it in hardware after the proof of concept and the
working out of the bugs.

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this is the protocol stack written in VHDL with no C and no processor and n
o ?hardware compilation? from software,? said Paul  
Walker, CEO of 4Links.
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o.  Once you get an idea in your head it might as well be in mask programme
d ROM... it ain't changin'.  

See above.

You have to read what's there, as well as what isn't there.  They
never said "no software" but only no C, and no hardware compila-
tion from software.  It doesn't mean they don't have their own
assembly language, or a custom compiler that doesn't use C, to
write their own software layer, to run on their own hardware.

Think about it.  I could be wrong in my interpretation.  But you
could also be wrong in yours.  And whereas you are quick to point
out to me where I make my mistakes and how I am wrong ... are you
willing to turn that scrutinizing assessment back upon yourself?

--  
Rick C. Hodgin

Re: Is it possible to implement Ethernet on bare metal FPGA, Without Use of any Hard or Soft core processor?
On Monday, February 4, 2019 at 5:13:10 PM UTC-5, Rick C. Hodgin wrote:
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wrote:
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from

Except for the part you quoted that says, "no processor"...  But then you w
ant to define the language the way it suits you best.  Duh!  

Besides there are other places where they indicate "no software".  


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What emulation???  What are you talking about exactly?  What makes you thin
k they hadn't already done everything you seem to be talking about and have
 it 100% in hardware/HDL when this was written?  

Oh, I know why, because that doesn't suit the first idea that came into you
r head and you are totally incapable of backing away from a wrong opinion,  
just like always.  


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t this is the protocol stack written in VHDL with no C and no processor and
 no ?hardware compilation? from software,? said Pau
l Walker, CEO of 4Links.
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 to.  Once you get an idea in your head it might as well be in mask program
med ROM... it ain't changin'.  
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There is other language to indicate they don't have software in the FPGA, y
ou just choose to ignore it.  Most likely because of your limitations to ba
ck away from a thought once you've made it even if it is wrong.  


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You are saying they have a processor because that's the way you think it sh
ould be done.  The whole point of this product was that it didn't involve s
oftware for whatever purposes they had.  Designing a processor in the FPGA  
and then writing code for it to implement a TCP/IP stack is a pointless way
 to do it and provides no market advantage in this case.  

If you were talking about a solution that had no other constraints, I would
 say a combination of software and hardware might be useful, but even then  
what parts of the TCP/IP stack can be done in software so that it doesn't s
low down the result?  

If you don't wish to believe any of this, I guess that's fine.  You have sh
own many times before that you only believe the first thought that comes to
 your mind and are entirely incapable of believing evidence based on it's m
erits once you have formed an opinion.  That likely explains a lot of the t
hings you believe in.  

I've said as much to you as I can.  Feel free to continue without me.  


  Rick C.

  +++ Tesla referral code - https://ts.la/richard11209

Re: Is it possible to implement Ethernet on bare metal FPGA, Without Use of any Hard or Soft core processor?
On Monday, February 4, 2019 at 5:49:09 PM UTC-5, snipped-for-privacy@gmail.com wr
ote:
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m wrote:
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:
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? from
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I take the "no processor" to mean they aren't using an embedded
processor.

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I haven't read those.

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A software emulation of their hardware design that allows them to
write their compilers, linkers, test programs, and design the whole
hardware device in emulation prior to writing one line of VHDL code.

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It's possible they did that, but I would be surprised and amazed
if it were so.

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I've said multiple times in this thread I could be wrong.  However,
I do not believe I am.  When it is proven I am, I will admit it.

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 you just choose to ignore it.  Most likely because of your limitations to  
back away from a thought once you've made it even if it is wrong.

Point it out to me.  Quote specific portions and I'll acknowledge
it if I was wrong.

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I said I would be surprised and amazed if they didn't.  I didn't
say they didn't.  I said, "I'd wager..." and other such language
indicating my opinion.  Those phrases were intermixed with me also
saying many times, "I could be wrong."

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I view software in the form they're talking about as being some
external source, a ROM or flash-like device that they can read
the program which runs it from.  Traditional software operates in
this way.

If their marketing department is trying to veer away from that
traditional model, it would be to their benefit to say they do
not have software, referring to them not having it in the tradi-
tional sense, but I'd wager they do have some kind of software
in their design, albeit of the non-traditional form.  I'd wager
they could change their design apart from VHDL (unless the code
they have is baked into VHDL data, but even then they're not
really changing the VHDL but only the VHDL data), re-synthesize,
and have a new core without changing any of the FSM designs on
the inside, and now it works with a new version of their soft-
ware, reflecting their changes.

I could be wrong.

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A traditional CPU yes.  But a specialized CPU ... not at all.
It would be a specialized design for this purpose, with several
instructions which operate the FSMs which do their job in a seq-
uenced execution of FSM manipulation.  I see this as a very de-
sirable solution on many levels.  But, I could be wrong.

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You don't design the CPU that way.  You design the CPU to have
an instruction that handles the necessary CISC-like operations
via a single instruction.  It directs the hardware you've de-
signed specifically to execute a particular task, and it does
so by software.  It stores things internally in a way that does
allow for later post-unit manipulation across a common / shared
bus, and then allows them to be sent "off-CPU" on the main bus
to other units for additional processing.

It is how I would do it. :-)

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You have no evidence to back up that claim, and I have mountains
of evidence which prove the contrary.

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"And they were forced to eat Robin's minstrels."
"And there was much rejoicing."

--  
Rick C. Hodgin

Re: Is it possible to implement Ethernet on bare metal FPGA, Without Use of any Hard or Soft core processor?
On 05/02/2019 00:18, Rick C. Hodgin wrote:
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You accept that they say "no processor", you understand they are not  
using "an embedded processor", yet you think they are using a  
"proprietary tiny VHDL-only core" to run software?  What do you see as  
the difference between a "processor" that runs software and a "core"  
that runs software?  (Hint - there is /no/ difference, and this design  
does not use a processor, or a core - whatever term you choose).


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Fair enough.  Trust the judgement of people who have.

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They don't have compilers, linkers, test programs - they don't have any  
software running on the device.  (They will, obviously, run simulations  
on their VHDL during development.)

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So you keep saying.  So be surprised, and be amazed, because that is  
what they have done.

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The only proof anyone has is the information on their webpage.  But it  
is clear enough to others.  Your choices are to read it and believe that  
there is no processor or software of any kind in their design, or read  
it and believe they are lying.  Reading some of it and misinterpreting  
that bit based on your preconceived notions and biases, despite others  
helping you with explanations, is not a logical option.

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Just start with the bit already discussed - it is sufficient on its own.  
  However, you can go further and read about their justifications and  
motivations for the design - the idea is that without software, the  
whole thing will be faster and more secure.

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You've said you'll admit being wrong when shown that you are wrong.  You  
are wrong, you've been shown to be wrong - now accept that.  (There is  
absolutely no problem with being wrong, especially about something you  
think is surprising and amazing - there is only a problem when you  
continue to deny it after the facts are on the table.)

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Then your view of "software" is muddled.  That may explain your  
misunderstandings about the design - so let's try to correct this  
particular mistake.  In FPGAs, ASICs, microcontrollers, and any other  
large chip, it is not uncommon to have software /within/ the device.  
This can be given as an array of data in VHDL or Verilog, or come from  
other sources, and be turned into ROM or initialised RAM within the  
device.  It can be for boot code, setup code, microcode, programmable  
state machines, or all sorts of other purposes.  It is still software.

A "processor" and "software" means you have one device - the processor -  
that reads sequences of instructions - the software - and executes those  
instructions.  It does not matter whether the software is external,  
developed independently, written in any particular language.

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You are not wrong to say that saying they have no software is a benefit  
to their marketing department - and if you want to suspect them of lying  
for marketing purposes, that's up to you.  But you are wrong to say your  
views here are consistent with the design they have described.

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It would be a pointless task, because designing a specialised CPU is a  
very expensive task (in time, resources, money, risk, etc.) and would  
provide very little gain for that investment for a task like a TCP/IP  
stack.  Specialising an existing soft CPU by adding instructions geared  
towards faster TCP/IP processing - /that/ could make sense.

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Other people would not design a CPU for that task.  They would use  
existing CPUs.

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Your "evidence" is that you, personally, would be "amazed and surprised"  
if there is no software.  That is not something anyone else considers  
evidence of any kind, much less "mountains".  On the "no software" side,  
there is all the information on their website.

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