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Insert IP cores

Im trying to make use of the fifo in my Spartan3E starter kit

i've added the component declaration and instantiation template as instructed in the vho file. but im getting the following error when i try to implement the design

ERROR:NgdBuild:604 - logical block 'FIFO' with type 'fifo_generator_v3_3' could not be resolved. A pin name misspelling can cause this, a missing edif or ngc file, or the misspelling of a type name. Symbol 'fifo_generator_v3_3' is not supported in target 'spartan3e'.

Ive also added "Library XilinxCoreLib;" at my top module, which refers to the fifo component.

am I missing something?

Reply to
Zhane
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Hi,

this error indicates that the design hierarchy is not complete most likely there is also an ngc file generated which is the actual content of the core for ISE is this file in the same folder as your ise project? if not you could set the macro search path to include the folder in searching for all required files

Regards, Stephan

Reply to
Stephan van Beek

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how to set a macro search path?

Reply to
Zhane

if you right click on implement design > properties > translate properties the macro search path is one of the available options to set, you can also set multiple paths seperated by ;

Regards, Stephan

Reply to
Stephan van Beek

.
s
s
o

ooo it searches every sub directories?

Reply to
Zhane

ooo it searches every sub directories?

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No I don't think so, but you can add multiple paths.

Stephan

Reply to
Stephan van Beek

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