Hi Is there a technique to 2x our input clock and as a general Is there a technique to create a clock with frequency of n*f_input_clk. (where n is a desired integer) Thank you
- posted
17 years ago
Hi Is there a technique to 2x our input clock and as a general Is there a technique to create a clock with frequency of n*f_input_clk. (where n is a desired integer) Thank you
With Xilinx, use a DCM. With Altera use an ALTPLL. Any other construct for doubling a clock is very dependant on process, voltage and temperature, i.e. the clock shape will change with voltage and temperature, and has a wide spread between devices.
Best regards,
Ben
Thanks Ben Can you explain ALTPLL. Actually I'm using altra fpga(flex10k family).
Best wishes, Mahdi
mahdi schrieb:
It is a phase-locked loop for frequency multiplication.
I am not sure, but AFAIK the ALTPLL is not included in this family.
If you really need signal processing at the doubled clock rate (think twice about it!) then maybe pseudo dual-edge flipflops are a choice: . But I strongly recommend to use a faster oscillator and a clock divider for the other parts.
Ralf
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