You, too, have presented the unachievable spec of "not delayed," yet the sequential instruction nature of microprocessors means that there will be delays. The trick is to first understand the system's acceptable level of delay and include sufficent performance in that system's hardware design to be able to meet that system's requirements reliably, even if one must disable interrupts for a few instructions to be able to accurately perform a non-atomic read of a shared variable.
I see, too, that you have specified a "simple system," just as did Robert Scott, yet you imply multitasking and you have both specified the rather stringent requirement of no jitter/delay. You simply cannot have it both ways!