> I'm interested in compiler optimisations aiming at the
> improvement of the instruction cache behavior. For data
> caches there are numerous compiler optimisations, many
> of them operating on loops. However, for instruction caches
> I've just found some very few on google.
>
> Could you give my any hints/references for any (further)
> instruction cache optimizations? I appreciate any answers.
Don't multi-post. Cross post. See my answer in another newsgroup, comp.arch.embedded.