Help with I8259

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Hi All,
I need some help with interrupt controller unit.
I have controller based on I386EX CPU. I mapped ROM from E0000h - FFFFFh
address(128KB).
RAM 00000h-3FFFFh. Now I need to setup ICU, but I do not understand how
interrupt vector number points
to  a location in memory where INT service routine should be  stored.

Real Mode.
                 Just an example:
                .Org     0E1000h
mov dx, 0f020h                ;8259 address
mov al,11h                      ; ICW1
out dx,al

mov dx,0f021h
mov al,40h                  ;ICW2 - base interrupt vector -? Where  is
memory location address CS:IP-??
out dx,al                      ;

                               ;ICW3
                               ;ICW4

Thanks,
Val



Re: Help with I8259

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ICW2 contains the first interrupt vector of the first interrupt handled by
this 8259.  An interrupt vector is a number 0-255.  If you initialize ICW2
in one of the 8259s to e.g. 0x20, this 8259 will generate interrupt
0x20-0x27 when it receives requests on IR0-IR7.

When an interrupt occurs, the processor gets the vector from the interrupt
controller.  It then looks up the address of the interrupt handler function
in the interrupt vector table.  The interrupt vector table is a table of
four-byte entries -- each entry is a far pointer (two bytes offset followed
by two bytes segment) to the interrupt handler function.  Since there are up
to 256 interrupt vectors, the interrupt vector table is up to 1024 bytes
large.

The interrupt vector table starts at absolute address 0.  When the processor
receives an interrupt, it reads the address of the handler at address
segment=0, offset=4*vector.

In addition to initializing the two interrupt controllers and your
interrupt-generating peripherals, you must also initialize the relevant
entries in the interrupt vector table to point to your interrupt handler
functions.

Karl Olsen



Re: Help with I8259
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The 8259A gives the interrupt number (one byte, 0 to 255) which
is often called a vector, though it is an index into the vector.

In real mode the interrupt vector is in the first kilobyte of
the address space, each vector slot contains 4 bytes of the
interrupt handler address: two bytes of IP and two bytes of CS.
The vector slot n starts at the byte address 4 * n.

In protected mode, the interrupt vector is in the interrupt
descriptor table (IDT) which has to be set up to comply with
the other descriptor tables (GDT and maybe LDT). The entries
in the interrupt desrcriptor table are interrupt gates or
task gates. For details, see the Intel programming documentation.

HTH

Tauno Voipio
tauno voipio (at) iki fi


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