I'm trying to kick out a simple (ha ha!) assembly language project in which I perform some simple DRAM tests on board based on the TI AM3352 using a 512 MB DRAM (256M x 16).
Ideally I'd like to just treat DRAM as a flat address space from
0x80000000 to 0x82000000.- Can I just "turn off" the MMU?
- Should I keep data cache turned off as well?
- Are there any access sequence restrictions? E.g., can I just read/write each 16-bit value sequentially?
- Any other gotchas?
I believe I've got the EMIF/DDR3 controller initialized properly (I used the u-boot code for the beaglebone black), but I can't get the test code proper running. I'm getting DABORT exceptions on the _second_ time through the write loop in the following code.
Any help would be appreciated.
--Randy
#include "asm-defs/asm-defs.h" #include "asm-defs/prcm.h" #include "asm-defs/emif.h" #include "asm-defs/control.h" #include "asm-defs/cm.h"
.cpu cortex-a8 .text
//---------------------------------------- // Randy Yates // // entry: // ro = base of DRAM test. must be even since DRAM is 16-bit words // r2 = count of 16-bit words to test // r3 = value to write (lower 16-bits)
// routine usage // r1 = current offset into r0 (base of dram test) // r4 = value read back
// return: // r7 = result (boolean: test successful) // 0x01 = test passed // 0x00 = test failed //----------------------------------------
.fun ddr3_value_test push {lr}
mov r1, 0
// first write all values ddr3_value_test_write_loop: str.n r3, [r0, r1] //