P-channel MOSFET gate-source diode

Good. I guess I was extrapolating from JFETs. An yes, John Larkin, I will be limiting the current with 100K anyway. So thanks to both of you, I will proceed with the design.

Robert Scott Ypsilanti, Michigan

Some mosfets have g-s zeners, but only a small minority. What part did you have in mind?

If it has one, you'll forward bias the zener as you try to turn the fet beyond off, positive gate, and you'll need to limit that current somehow; "a few more volts positive than the source" would be bad news. But it won't show up as drain current... it will come out the source.

If it doesn't have a zener, pulling the gate positive of the source just leaves the fet off.

John

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There is current flow called IDSS =3D zero-gate drain current when the mosfet is off =3D 0 VGS. This is the current that would flow if the mosfet source(drain for p-ch) was connected directly to ground. A load would not significantly change since it would not be comparable to the effective resistance of the mosfet(which is around 10^7).

By decreasing VGS below the source(increasing for p-ch) you can turn off the mosfet quicker but I do not believe you can effect the drain current significantly. Looking at the graphs you'll see that when VGS is below 0 the graph is virtually flat.

Why don't you look up the spec sheet for it.

It tells you the leakage in the off state.

I can tell you that it's very low.

Also beware of body diodes some varieties.