I'm trying to debug a new design using this ADC. It's being used to sample a 1.2V pk-pk sinewave with an offset of 1.2V. I.e. the required full-scale input range is 1.2 - 2.4V.
The ADC setup currently is:
Vin+ connected to incoming signal Vin- = 1.2V Vref = 2.5V Vrefgnd = 1.2V (Vin- and Vrefgnd are tied together on the PCB) AVDD, DVDD = 2.5V OVDD = 3.3V
The input signal is buffered by an LT1818 used as a unity-gain follower. The buffer amp is powered from a separate 4V rail. This all looks OK, no stability problems.
However I only seem to be using a small part of the operating range; the output codes span ~ 44000 - 58000 for the sinewave above. If I drive the input of the buffer amp with a pot instead, and sweep it between 0V and 2.5V, I get a useful range of ~17000 = 0.6V to 65535 =
2.5V. (The LT1818 can't quite swing rail-to-rail).This bit of the design was done by a subcontractor, clearly he was expecting the input range to be (Vref - Vrefgnd)
However looking at the small print of the datasheet (Table 7 page 16) it seems the transfer function of the ADC is more like
code = 65535(0.5 + 0.5((Vin+ - Vin-)/(Vref - Vrefgnd)))
i.e. the input range is 2(Vref - Vrefgnd) so to use all of the ADC range Vin+ must be able to swing below Vin-.
If I plot this transfer function in Excel and overlay it with the pot test results above, they match exactly. So far, so good.
The datasheet doesnt't say explicitly but it implies the only requirements are Vref > Vrefgnd and that all four pins are within the supply rails.
So I tried increasing Vin- and Vrefgnd to 1.8V. That should give an input range of 1.1 - 2.5V which is close enough. It doesn't work! I now get a useful range of 1.8V +/- a few hundred millivolts i.e. it clips at 65535 for Vin+ > 1.82V, 0 for Vin+ < 1.78V.
Vref, Vrefgnd and Vin- are both driven by low-dropout regulators and appear solid on the scope during sampling.
What am I missing?
TIA
Rhydian