I was told to research if a PIC clock divider would be better or worse than using a CPLD divider. I would think that a combinatorial logic would be more reliable than some software running on a PIC?? Also the jitter would be less with propogation delay on discrete logic than a PIC??
We are looking to create a 10Khz clock from something much faster. It needs to be a stable/clean output. Anyone have any comments or things I could research?
thanks