Hi,Has anyone successfully used MPMC2 as the memory controller for DDR2 SDRAM? Iused it to interface with the Micron's MT47H32M16CC-37EB DDR2 SDRAM and itdoesn't work. Any important steps/settings required in order to get it working?Thanks.
Hi all, Has anyone ever had success routing an NPI port of the MPMC2controller to an External Port of a PPC based system component in EDK(i.e. I would like to route an NPI port to some custom logic...I usethe flow where I use EDK simply...
Hi i'm using the Xilinx GSRD design.Now i try to connect a simple IP core to the reference design.The problem is that i can not connect my IP to the OPB or PLB bus. The 2 PLB Bus controllers supports only 1 Master and 1 Slave and they are...
I'm using ISE 8.2i and XPS 8.2i with a new Xilinx Starter Kit (theXC3S500efg320-4 FPGA on a Rev D board) and can not get the DDR SRAM topass any memory tests. I have built four or five different memory testprojects including at least one...
it seems that Xilinx has real problems getting even simple FIFOs towork after having problems with Virtex4 coregen FIFOs I have nowsuccesfully wasted - about 2 weeks, because another Xilinx FIFO bug! :(because of REALLY low performance of...
Hi,how can I make a MPMC2 and a MontaVista Linux on ML403 from Xilinx work together?Is there a howtoguide for that problem or has anybody experiences with that stuff?Thanks a lot :-)Eric