configuration of serial fifo

Nov 02, 2005 2 Replies

Hello,



after receiving a special character on a UART, I would like to send out another character in less than 2ms. I can have good latencies of about some



50µs, but often I get 3ms, which is too long. I think, this is because of the fifo. How could I configure the fifo, to get triggered at every character? Here is my setup:

struct termios options; struct serial_struct serial; int fd = open("/dev/ttyS0", O_RDWR | O_NOCTTY);



ioctl(fd, TIOCGSERIAL, &serial); serial.flags |= ASYNC_LOW_LATENCY; serial.xmit_fifo_size = ???; // a value of 1 here does not change a lot ioctl(fd, TIOCSSERIAL, &serial);



tcgetattr(fd, &options); cfsetispeed(&options, B19200); cfsetospeed(&options, B19200); options.c_cflag &= ~(CSIZE | PARODD | CSTOPB | CRTSCTS); options.c_cflag |= CLOCAL | CREAD | CS8 | PARENB; options.c_lflag &= ~(ICANON | ECHO | ECHOE | ISIG); options.c_iflag |= INPCK | ISTRIP; options.c_oflag &= ~OPOST; options.c_cc[VTIME] = 0; options.c_cc[VMIN] = 1; tcsetattr(fd, TCSANOW, &options);



I've discovered the file linux/serial_reg.h with a lot of definitions, for example: #define UART_FCR_TRIGGER_1 0x00 /* Mask for trigger set at 1 */



But I don't know where I could find some documentation how to use these defines...



I only know the "Serial Programming Guide for POSIX" but perhaps I need something more specific to Linux...



Thanks in advance for any help! Cheers, Peter


email: pmrb at free.fr http://pmrb.free.fr/contact/

Hi Peter,

There is also the "Serial Programming HOWTO" which is specific Linux at

formatting link
but I don't think it answers your question. Can Linux guarantee a maximum latency for a task in the first place? I wouldn't think so, without some of the real-time additions. Do you have other processes running? Have you played with the NICE values?

Regards,

Ala> Hello,

No, but I don't need guarantee, I only need good latency for about 99,9%.

I use sched_setscheduler(0, SCHED_RR, ...), that should be enough for some soft real-time.

When I get 3ms latency, there is no load on the system, so I think it's just because not every character triggers an interrupt. Of course, I could modify the driver for the UART (for example drivers/serial/8250.c), to disable the fifo, but I prefer a solution without modification of the kernel.

Greetings, Peter

email: pmrb at free.fr http://pmrb.free.fr/contact/

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