XST :division and mod in vhdl

divisor is power of 2. May I know whether is there any way of getting around this problem? Does the usage of std_numeric solve this problem, or do I have to write my own algorithm to do this? Is there any predefined package somewhere that can do this for me?

do you know how a division by a power of two is done in hardware?

Division in general is hard, but often your requirements may make it easier, for example, you might want to divide by a constant, or perhaps you have a lot of clock cycles to use (or you don't care about the speed) etc.

Often one attempts to change the system architecture to avoid the need for division altogether.

What are you trying to do?

Regards, Allan

Since you don't care about speed or number of clock cycles:

1) Set a counter to zero 2) Copy the dividend to an Accumulator 3) If Accumulator is less than divisor, go to step 7 4) Subtract divisor from Accumulator 5) Increment counter 6) Goto step 3 7) Counter is Quotient, Accumulator is remainder

This is called division by repeated subtraction. Are you still sure that you don't care about speed :-)

If you want more precision, you can extend the accumulator at the LSB end, and scale the divisor (divide it by a convenient constant) as well. For example, you could add 12 zero bits at the LSB end of the Accumulator, and divide the divisor by 4096 (which requires exactly zero logic and zero time). The Counter also has to be 12 bits longer, and the algorithm will take 4096 times as long to run (which you don't care about). The result will be 12 bits more accurate. There will be a binary point between the 13th and 12th bit (from the LSB end) of the counter. The stuff to the left of the binary point is the integer part of the quotient, and the stuff on the right is the fractional part. The remainder in the accumulator also has this format.

Philip

=================== Philip Freidin snipped-for-privacy@fpga-faq.org Host for

for fewer passes... there is also successive approximation... Use the hardware multiplier and a 32 bit register..

1/ set msb 2/ multiply a x b 3/ if greater clear msb 4/ set next msb 5/ repeate 2 to 4 31 times

32bit

where I