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Xilinx ISE DRC: An antenna found

Hi all,

After I use Xilinx ISE do Place & Round and generate bit file, I am confused with a DRC warning=E3=80=82

"WARNING: DesignRules:7-Netcheck: An antenna was found on signal; this means that a branch of this signal is partially routed or has a routing stub".

I found bit file with this DRC warning cannot work properly.

But what's this signal connected to? A tri-state bus? Or this signal wire form a loop?

Any suggestions will be appreciated! Best regards, Davy

Reply to
Davy
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You have to go back and look at the place & route report. I'm surprised that this is a warning and not an error. It sounds like the router didn't complete...

Reply to
Gabor

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