Hi,
I am using a Xilinx Virtex Pro P20 FPGA.The system clock (155M) is comes out of a DCM FX which is phase locked to input 19 M. Everything works fine till 75 degree temperature. But as the temperature crosses
75 degree I see my logic behaving badly. I clearly suspect the DCM because at 80 degree centrigrade the system clock (155M) stops coming out of DCM. It is always low.The virtex pro data sheet says the maximum temperature range to be
85-90 degree centrigrade.Is there is solution to this. There is good heat sink on the FPGA. Has anyone seen this problem before ? Logic utilization is around 65 %.--Debashish