I want to learn Verilog for small FPGA degigns. I don't have a background in VHDL but I am an experienced designer. For simple designs, I have used the schematic capture method.
What do you guys recommend?
I want to learn Verilog for small FPGA degigns. I don't have a background in VHDL but I am an experienced designer. For simple designs, I have used the schematic capture method.
What do you guys recommend?
background
used
I recommend Verilog HDL by Samir Palnitkar. It is the best Verilog book for a beginner (people who never been exposed to HDLs but familiar with logic design). The author explains exactly what's going on in each line of the code. Other authors usually just give you a bunch of examples without explanation. The book helped me to complete my projects with great success. For more explanation please see my review at amazon.com.
Hendra
background
used
I recommend Verilog HDL by Samir Palnitkar. It is the best Verilog book for a beginner (people who never been exposed to HDLs but familiar with logic design). The author explains exactly what's going on in each line of the code. Other authors usually just give you a bunch of examples without explanation. The book helped me to complete my projects with great success. For more explanation please see my review at amazon.com.
Hendra
Al, Also note that Verilog /= VHDL
If you are interested in VHDL, I like: A VHDL Primer by J Bhasker.
Cheers, Jim
Jim Lewis wrote in news: snipped-for-privacy@corp.supernews.com:
Thanks Jim,
I know that Verilog is not VHDL. I was just trying to point out that I don't have that background either.
I am using Verilog because a portion of my project was already written in Verilog by someone else.
Al
One suggestion, always write your synthesizable code from the examples given by the tool vendors. Both VHDL and Verilog will compile and simulate code that can no be synthesized. So design your hardware first, as a block diagram or in any other form that lets you see the registers and blocks of logic. Then write your code using the examples the vendors provide for the various blocks in your diagram.
When used to build hardware, HDLs are not programming languages. They are hardware description languages, hence HDL, not HPL.
Might want to check out "HDL Chip Design" by Douglas H. Smith.
Teaches Verilog, VHDL, and shows the schematic equivalent next to the code.
-- Pete
Al Clark wrote:
background
used
There are several good threads on comp.lang.verilog
A book I've found useful as a reference is: The Verilog Hardware Description Language
by Thomas & Moorby
Have something to add? Share your thoughts — no account required.
Ask the community — no account required