User inputs into Spartan-3E starter board?

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- shadfc
  
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posted
16 years ago

Tue, Jan 15, 2008 10:46 PM

Hey all, I need to input 2 signals into my spartan development board. These will be 5V(+/-10%) signals which I am running through 500 ohm series resistors for protection per

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My question is, where can I safely connect the inputs on the development board? Just as added info, the design is a homebrew ballistic chronograph for paintballs. I'm using a 2 IRLED gate system at a fixed separation

-- the signals represent the gate outputs obviously. I only need a frequency of about 75microseconds.

thanks, Jay

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- John_H
  
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posted
16 years ago

Tue, Jan 15, 2008 11:04 PM

se

power.pdf.

Most inputs are "safe" but using one of the side connectors would be "convenient." J1, J2, and J4 are on the bottom right of the board and are powered by 3.3V Vcco rails so those should work fine for you. There are many options, those are just rather convenient.

Have you looked at the starter board's user guide? (UG230)

- John_H

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- shadfc
  
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posted
16 years ago

Wed, Jan 16, 2008 12:20 AM

per

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Hi John, Yeah, I've read the User Guide and I tied my design to two of the pins in J4 initially before I posted here. However the placer gave me the following errors during synthesis:

ERROR:Place:311 - The IOB gateB is locked to site PAD20 in bank 0. This violates the SelectIO banking rules. Other incompatible IOBs may be locked to the same bank, or this IOB may be illegally locked to a Vref site. ERROR:Place:311 - The IOB gateA is locked to site PAD16 in bank 0. This violates the SelectIO banking rules. Other incompatible IOBs may be locked to the same bank, or this IOB may be illegally locked to a Vref site.

I had the pins D7 and E8 as LVCMOS33 when I got those errors. I just changed it to LVTTL and the placer completed. I am not really sure why -- you're welcome to explain if you want. I'll be the first to admit that I dont understand a ton about the internals of this stuff.

Jay