Hello everyone, I have recently started working on a project using Ethernet in an FPGA and I am using the UDP protocol for communication between the PC and the FPGA. The communication is happening point to point so I was wondering do I need ARP implementation in my stack or can I just broadcast the message.
I am building a UDP stack but was wondering is ARP a necessary requirement. Also, the FPGA doesn't have MAC or UDP port so what value should I assign to them before sending. Thank you in advance
If your connection is really point-to-point, i.e. a physical cable that goes straight from a host to another, you should be ok without ARP. If you instead have any routing device in the middle (a switch, a wifi access point etc..), you should implement ARP or you might have problems.
Again, if you are straight point-to-point you can assign any MAC address, as long as it is not all zeroes or FFs. Otherwise you should assign a "real" MAC address, that you can "steal" from any ethernet device that you are not going to connect on the same network.
Ok, thanks for the response. I still had one question regarding the UDP. Since I don't know the UDP dest ination port what should I do in that case? How should I send the UDP messa ge from the PC to the FPGA? I am using scapy for sending data.
One issue is you are mixing up details at different 'layers' of communication.
UDP is a transport layer protocol while ARP is a link layer.
WIth a direct connection between the PC and the FPGA, you don't really HAVE a link layer, which is where a MAC address would matter.
The question comes how you will tell the PC stack how to 'address' the packet to tell it to send it to the FPGA. That might require some hard wiring in the stack to provide a routing to the FPGA. The FPGA likely doesn't need to generate anything there, as it can be just fixed in the driver to it.
As to a UDP port number, that would determine what the FPGA will do with datagram.
Are ALL datagrams interpreted the same? if so, then it doesn't matter what port you use. (maybe the datagram has enough details to define this).
Possibly, you want to be able to send datagrams to different 'ports' in the FPGA to be processed for different purposes, and if you don't need it now, you may just want to be using a fixed port so you can add others in the future.
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