I can't speak for the VMM, but the AVM does use SystemVerilog mailboxes at the heart of its tlm communication.
The reason this is not obvious to the user is because the AVM channels (eg tlm_fifo) provide additional functionality over a pure mailbox, with multiple communication interfaces (put, get, peek, blocking, non-blocking ...) and analysis ports to send any transaction written/read to/from the channel to any registered analysis components (scoreboards, coverage collectors ...)
If you've downloaded the AVM
have a look at utilities/systemverilog/avm/tlm/tlm_fifos.svh for the detailed code and you'll see the mailbox construct.
Also, the AVM's use of virtual interfaces is not related to tlm communication. The virtual interface is the mechanism used to link the class based verification environment to the module based dut. Generally this is connecting a pin-level transactor (with a virtual interface) to an actual interface on the dut.