hi geeks,
I have been using the xilinx foundation 5.2i and 4.2i. The design used to work on board with both these versions earlier. But now with a few additions to the code/design , the code some times works with 4.2i but never with 5.2i.
I brought out (on the board) the internal signals ,but very strange behaviour is seen, which is very absurd e.g. the signals required for the state machine to go to the next state are generated, but the state machine remains in the same state . Another example :- a signal has to be set under certain conditions, this conditions are seen on the debug pins, but still the signal is not set. Here there is no timing issue, all the timigs are met .
I am really clue less as the synth/ warnings are also inconclusive. Is it due to some fanout related issue (tool didnt issue any warning abt it though..)
If anybody has faced similar problem ?