Hello I have been writing some VHDL code for my CoolRunner CPLD. I am a beginner. I have made a project that counts events and sends them to a 16-bit counter. Currently I just look at the binary output.
I would like to latch the counts and serially shift the counts out as SPI In hardware I would use a latching shift register like a 74HCT165 and would use /PL as a chip select and tie CP to SPI_CLK and Q7 to a buffer then to SPI_MISO Nothing fancy.
So I guess I am asking if anybody has some VHDL code for a parallel in SPI out latch, or a SPI output counter.
Any help is appreciated. Martin