I see that Xilinx claim 0.92 Dhrystone 2.1 mips/Mhz for Microblaze and Altera varously up to 1.2 dmips/Mhz. Does anyone know if these are measured with inlining enabled? I found Xilinx XAPP507 which implies that their headline "DMIPS" figure for the embedded powerPCs is with inlining enabled but I can't find anything similar for the soft cores.
Soft processor performance
Jul 24, 2006
1 Replies
Can't say for Altera but for MicroBlaze we disable inlining while doing dhrystone benchmarks since the idea behind the dhrystone benchmark requires a percentage of procedure calls. Inlining would remove that. I think it would violate the main idea behind the dhrystone benchmark.
We get a higher DMIPS/MHz if we allow inlining. And to make sure that no inlining is done we compile with the '-fno-inline' flag to GCC. If we don't have that flag, the amount of inlining depends on the version of GCC since they difference in the amount of inlining.
Göran Bilski
Join the Discussion
Have something to add? Share your thoughts — no account required.
Didn't find your answer?
Ask the community — no account required