RocketIO clock recovery

Nov 15, 2004 1 Replies
T

Hi,



I´m asking me if the REFCLK has a closer relationship to the recovered clock than mentioned in the user guide.



Could this be possible: Using a fixed osc. with a frequ. of 100MHz as REFCLK. Receiving data with a variable datarate?



TXCLK= 50..100MHz (TX) ----- fiber ------> RXRECCLK = (50..100MHz), REFCLK=100MHz



Does the recovered clock has phase jumps, nice duty cycle etc - in other words: is it possible to use that clock as an input clock for an external clock synthesizer?



kind regards, thomas


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A

clock

one word: NO

the initial CDR lock range is +-100ppm as per RocketIO/X datasheet

if you need to recover data with variable bit rate this maybe doable using rocketIO in raw serdes mode and doing oversampling. you need to sample about

4-5 times per data bit and you need custom data recovery circuitry.

Some xilinx application use that technology. For your application I guess its not suitable.

Antti

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