I have some general question for implementing a general RISC architecture. I have coded so far the fetch, decode, execute and writeback stage.1) Next step is to implement forwarding. Do I have here a 2:1 multiplexer in front of the alu that takes as input the output of the alu of the former cycle and the source register and the decode stage then sets the multiplexer select signal ?
2) How is it working with a NOP instruction? Does there the alu "execute" for example a R0 = R0 + R0. As R0 is always zero this doesnt have any effect. Or is there somehow an additional signal from the decode stage that tells the alu to do nothing?3) Normally the writeback is done in the first half of the clock cycle whereas the registers are read in the second half in the decode register. Does this mean that the decode logic just works in the second half of the clock cycle or does it do some stuff in the first clock cycle and then just read out the operands in the second half of the cycle?
I know some easy questions but would be helpful for understanding to know this ;)