Retiming a datapath

Hi, i've a problem using xilinx xst synthesis tool. I need to do the retiming of a combinatorial datapath. I followed these steps:

1) I've described the datapath with an assign 2) I've connected three register (connected like a shift register) at the output of the assign 3) I've disabled the shift register extraction for these signals in xst 4) I've set retiming by register_balancing option. When I synthesize my module xst is right because doesn't extract the shift register, but doesn't move the registers across the datapath in order to reduce the critical path. So the circuit is the same with the three register connected sequentiallu at the output of the assign. What do i have to do in order to see registers moving? Thankyou in advance Giovanni