question about filter design vhdl

May 17, 2004 1 Replies

Hi, I have to design a low pass filter in VHDL. How can one go about designing such a filter when the medium is event driven and time domain based?? How should one decide on the filter characteristics if we just know the symbol time rate. If I am using standard VHDL and not AMS is it possible for me to design such a filter which is used in the recovery loops of receiver? Most of the references on filter and digital communications refer to frequency domain analysis. How can I go around this problem? If the input is a pulse then a low pass filter is an integrate and dump. However if I have a sampled sine wave how could I design a low pass filter? Could you please reply and let me know? I would grealty appreciate your reply. Looking forward to your replies, Thanks Viswanath PS: I would be needing a filter after the mixing of two sine waves to filter out the higher frequency components


First realize that VHDL has nothing to do to your question. Neither do the FPGAs. Your question probably belongs to the comp.dsp newsgroup, but before you post it there I would recommend you to do some more homework.

/Mikhail

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