I need urgent help. Perhaps it is just a simple problem, but I don't know how to solve it. I try to design a simple CPLD project. I designed a simple schematic using a flip flop ("fd", for instance) and some logic gates and added some I/O markers. In the following user constraint menu, when I try to assign pins, the only pin names are C, D and Q and not the net names I assigned to the I/O markers. I am grateful for any ideas, thanks Hans
- posted
16 years ago