Many have attempted off-line translation of x86 with varing degree of success. IMHO it's too limited to be useful.
Using dynamic translation a la Transmeta is probably the best way, but writing the dynamic translator system is a vast undertaking.
If the goal is to implement a moderate x86 on an FPGA, I suggest implementing the subset of 32-bit x86 (or maybe even AMD64) big enough to completely run a x86 interpreter, such as Borch, and then trap unimplemented instruction and modes and let the interpreter handle them. As long as all of the frequently instructions are handled directly performance should be resonable (for a scalar FPGA implementation) and the implementation would be vastly simpler than a full x86.
Just another idea, Tommy