We are currently proposing to do a FPGA based fm receiver using VHDL. We are newbies in the VHDL programming and we are currently reading books and journals about it. We are students in the Philippines. We would need some help in developing this project. We would appreciate it if someone would advise us in our thesis if we post some questions and if someone would give us ideas. Thanks in advance. You can contact me in these addresses firstname.lastname@example.org or heinrich email@example.com. You can call me Rich.
You really have two problems that you need to solve. You'd like these to be separate, but they aren't.
The two problems are: how to implement an FM receiver _at all_ in a digital system, and how to implement the digital algorithm on an FPGA using VHDL.
I would suggest that you start by tackling the first problem without paying any attention to any difficulties that may crop up when you address the second. Once you get it working as an algorithm, then address how you're going to make it work on an FPGA (and be ready to make adjustments).
I would suggest that you use SciLab or MatLab to do your algorithmic work, and test it in simulation. Were it me, I'd test it with vectors of real data, possibly ones that I had sampled with real ADCs with a real RF front-end using the real FPGA that I was going to use to do the demodulation. You can do a DSP algorithm in at least ten times fewer lines on one of these platforms than you can in an HDL. Using the mathematical packages to get the algorithm right will let you concentrate on the algorithm, not any peculiarities of your implementation.
Once you get it working in SciLab, then figure out how to translate it into the HDL of your choice. Because you already understand the algorithm, know how it works, and know _that_ it works you'll be able to concentrate on the HDL implementation without distraction. When you run into problems with your algorithm not fitting well on an FPGA, use what you have learned about the algorithm and the FPGA to modify the algorithm _first_, re-simulate it and re-verify it. Then take your modified algorithm and proceed with implementing it. This way you'll _always_ be implementing a known-good algorithm on your FPGA, which can only be a good thing.
Thank you sir, now we know how to deal with the future problems regarding the implementation using VHDL. At first we thought that we can already use VHDL without knowing Mathlab or Scilab but after reading your reply we considered the Mathlab and Scilab. Now we are planning to read books and practice using Mathlab or Scilab. We are unfortunate that in our curriculum we were not able to learn about these programs regarding the algorithms. Sir, do you have some tutorials or reading materials regarding Mathlab and Scilab so that we can use them in our thesis? Thank you again Mr. Tim Wescott for your post.