Hello friends
I am implementing a design which has about 250 32-bits unsigned numbers which have to be added to give the final outcome, since it is a very large number of elelments I think implementing this operation on FPGA would be very slow (250 cascade adders), I am thinking in using Carry-Save adders scheme to avoid the long propagation times due to the carry, but I am not sure now if it would really help. I need to carry out this additions in the shortest possible time, Carry-Save arithmetic would be helpful? is there any other scheme I can use to speed up the addition? (at some point I will need to increase the number of quantities to be added far above 250).
Many Thanks