More basic questions about Spartan 2 IOB

Still trying to understand the very basic IOB in all its details...

In the Spartan 2 datasheet I read: 'The IOB includes an optional register in the output path, the input path, and the 3 state control pin.

In the diagram this is clear.

Questions arise: Can the 3 state register be controlled independently? Are all 3 registers (plus the delay) active by default? Peeking in various .ucf files I find that some properties can be set:

NET my_net Clkp Does this mean positive clock on register? NET my_net OFFSET = OUT : 2.5 2.5 nS Does this mean delay in output? Is there also a programmable output delay?

So what are the exact commands for the UCF file to: Switch off / on the input register. Select a pos or neg clock for the input and output registers. What are the defaults?

Is there a specific xapp I should (have) read that describes this in detail, preferably with human readable examples?

The IOB diagram is clear enough by itself, but many things remain a mystery to me. For example if using clocked IOB on input, WHERE does the clock come from? I have 3 clock pins in use, how do you select? Is this hardwired somehow?

Sorry now I am getting into detail, but this I need to know to make any sensible circuits...

Reply to
Jan Panteltje
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What do you mean by "independently"? Look at the diagram. Are the clocks shared? Are separate clock enables good enough for your application?

The usual approach is that your code or schematics makes the registers and tri-state buffer, and then you place them in the IOB (if that's where you want them).

There are probably convenient library elements that may help you easily get what you want. You probably want to find the library documentation anyway - lots of good ideas in there, especially for the details like you are asking about.

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Reply to
Hal Murray

On a sunny day (Sat, 15 Nov 2003 18:32:18 -0000) it happened (Hal Murray) wrote in :

OK, I see, so it is more a matter of to pick a setup, and then force it to be in the IOB... Somehow I got confused about this.... thought IOB was perhaps a complete block with all those control / clock lines as input... If not then, if you place it in the IOB or not, only has influence on routing and thus speed?

I will go over all docs again until any confusion is gone. Thank you (all) for the help so far.

Reply to
Jan Panteltje

Hi Jan,

I suggest, that you download the latest version of the Xilinx tool chain if you don't have one yet supporting Spartan-II devices.

Then create a very simple design using IOB's ;-) Do the synthesis, P&R and start the FPGA Editor. This is for most of the time a nice tool, in order to see what the technology offers. Zooming into the IOB will clarify most of your questions ...

have a nice day


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Reply to
Markus Meng

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