24-bit SPI?

The usual method is to send three 8-bit transfers after each other, holding the chip select low during the transfer. Some SPI controllers (don't know about ARM chips) can do this automatically, but it's still just a series of standard 8-bit transfers.

Thanks. Most ARM controllers has both 8 and 16 bit SPI lenght because of efficiency (16 bit) (which is needed in my application) so that the controllers hasn't to put the three 8 bits together in a long var. manually (rotating and OR-ring). An alternativ question: is there somehow a better way to join the fractions into a 32 bit long (e.g. is the DMA controller able to transfer the data from the SPI and access the memory in 8 bit portions)?

Any help is highly appreciated.

I don't remember whether the ARM is big-endian or little-endian, but a common way to merge bytes into a long is to use a union : typedef union { struct { unsigned char lolo, lohi, hilo, hihi; } bytes; unsigned long longword; } merger;

Anyway, if your application can't afford the time taken to calculate "(hilo

Both. It's switchable.

-p

-- Paul Gotch CoreSight Tools Development Systems ARM Limited.

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manually

better

Sorry - didn't make myself clear - it's not the 16 bit I need - it's the efficiency. There will be no time to switch from 16 bit mode to 8 bit mode, so I'll use the 8 bit mode only. Ryan is right - we embedded people needs all the power that is available and often we are counting the clocks - but I guees that you David is also an embedded one :-) - thank you very much for your input!

still like to hear your ideas or a responce to the DMA thing.

Best regards orc

The problem is not the SPI but the other thing that the CPU has to do. My application are doing a closed lock loop in and out of the SPI from an ADC to an DAC and are doing calculations and data transfer to a PC between every sample - that's why every clock cycle used by the SPI, rotating bits etc is a wast of good CPU power. With a 24 bit interface everything would be nice because it would work by itself - setting a Int flag after each samle and not after each byte. Hope this clarified my concerns better - and again - thanking you for your input!

Best regards orc

So if you can't afford the time overhead, why use SPI in the first place? And even if you're going to use SPI, why do it on the main CPU, rather than having a separate transceiver take care of it? Or even a dedicated micro?

--
Hans-Bernhard Broeker (broeker@physik.rwth-aachen.de)
Even if all the snow were burnt, ashes would remain.

I would think a Atmel SAM7 with DMA SPI would be sufficient for your application, still have to perform shifts, but the DMA should relieve the CPU from most of the overhead. What is your data rates, how many spi devices? Usually optimal hardware doesn't exist for most projects, you have to use what available, every project I worked on usually involved using hardware that wasn't exactly what I wanted, but was good enough.

Thanks. I'm sampling at a rate of 8 ks/s (two 24 bit ADC and one 16 bit DAC). The data to the PC goes via the serial port (4 bytes at at each samlple). One ADC and the DAC is part of a control loop, so I'll have to do some math to calculate the next DAC value between each sample. By the way: is it possible to use the PWM output to form a digital DAC that correspond to 16 bit at

8ks/s? (This way I could put a power stage on the PWM output and form a puredigital amplifier) - the DAC actually controls a power amp that powers a shaker/speaker.

Thanks, orc

Hmm, if your data rates were a little slower (1Khz) you could use an integrated analog microconverter solution like

no spi rate to worry about, all parallel paths to the onboard 24 bit A/D and 16 bit DACs.