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Mentor FPGA Advantage, a simple question

I'm using Mentor Fpga Advantage 7.0 and really, I read the docs but I can't figure the difference between "through block" and "through components" in the possible invocation of the various design flow (DesignAnalyst, Modelsim Precision Synthesis, Generate... flow (right upper side buttons)) Can someone help?

Reply to
ciappalastringa
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Consider learning Modelsim all by itself first. You can't run synthesis until you have good code, and the only way to get good code is to edit/sim/edit/sim.

-- Mike Treseler

Reply to
Mike Treseler

Thanks for your answer but I already have a working code and my answer remain the same...

Reply to
ciappalastringa

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