Hi all,
I am using Altera DSP Builder to implement an OFDM receiver. I am working on Stratix II Altera FPGA.I need to send data into the DAC (in the FPGA board) from the matlab worspace and loop it to the ADC(on the board) and then perform certian operations on the data in the FPGA and route it back to the simulink/matlab worspace. Can I do it with the JTAG cable? I want the final values in an array form in the matlab workspace.
Thanks and Regards, Jayaram