How do I convert a polynomial into a parallel scrambler formula?

My polynomial is S(x) = x(-7) + x(04) + 1, but my input data is one byte each clock period. What are the equations to inplement this data scrambler?

Thanks.

Reply to
Kris Neot
Loading thread data ...

My polynomial is S(x) = x(-7) + x(04) + 1, but my input data is one byte each clock period. What are the equations to inplement this data scrambler?

Thanks.

Reply to
Kris Neot

what is the width of your polynomial. Is it -7 to +4....

Reply to
newsgroup

I am just giving a general hint, should be applicable to your case also after some changes

What you do is to tap the x7 and x4 bit of polynomial and XOR it with the bit 0 of incoming data stream. The xored value is your output bit 0. Then DEPENDING upon the protocol, you may either push in the output bit to msb position of polynomail and shift all other bits of polynomial either right or left depending upon your direction convention.

Repeat the above process each input bit....

Reply to
newsgroup

Sorry typo, should be S(x) = x(-7) + x(-4) + 1. What is the method to do conversion?

Reply to
Kris Neot

yeah, if one has patience, one can derive each byte one by one. I thought there must be some shortcut to this tideous process.

Reply to
Kris Neot

Kris,

definitely yo can do the whole process in one go. For that either you have to write a simple program which tells you the bit combinations or since in your case, data is just 8 bits, so you can manually derive the equation

But I guess, the synthesis tool will be doing the same thing for you, if you just write everything in loop, can't guarantee but it should do so.....

Reply to
newsgroup

Yes, it works. I have made scramblers that way (in VHDL). It should also be possible in Verilog, assuming your tool implements the 2001 version of the language.

Regards, Allan

Reply to
allanherriman

Apply it eight times before clocking; the tools will do the rest.

I'm not familiar with exactly the way you wrote your equation, but whatever you mean by it, apply it eight times to get your "byte" result.

Jason

Reply to
jtw

You may have to create a look-up table (LUT) that contains various "S" values for different "x" inputs. An LUT is kind of like ROM where you would use your "x" input as the address. These "S" values are easily computed using Excel or an open-source equivalent spreadsheet program.

Also the previous suggestion of performing a multiplication operation several times per cycle is a pretty good idea but it eats up resources or time: m = 1/x n = m * m * m * m * m * m * m o = x * x * x * x S(x) = n + o + 1

"m" will use up multiplication logic (to create the divider) "n" will use up the logic needed for 7 multipliers. *OR* If you adjust your data so that "n" is 8 bits wide then you can use a single multiplier that is 56-bits wide (7*8) but it will take 7 cycles to complete the operation.

I recommend using the LUT technique.

Best Regards

-Derek

Reply to
soxmax

And, you can check your result against the web-tool output at

formatting link

Reply to
Charles Gardiner

Are you trying to understand how it works or looking for a simple recipe for getting the job done?

I don't know of a simple recipe. I think there was a web site that may have generated VHDL/Verilog for CRCs. I forget. It was a long time ago. It might have done the parallel mode.

The software guys often do CRC calculations a byte at a time rather than a bit at a time. You can probably find a lot of good info via google. Basically, it involves a table lookup. The length of the table is the size of your "byte". The width of the table is the width of the polynomial used to make your CRC. To do the normal CRC-32 (Ethernet) CRC a byte at a time takes a 256 entry table where each entry is 4 bytes wide.

You can implement that table in hardware with a cloud of XOR gates. Some of the software routines compute the table at initialization time rather than pre-computing it and feeding a table of constants to the compiler. That tells you the cloud of gates that you need. (I think.)

There are many ways to screwup CRC/scrambler calculations. The common ones are getting left/right mixed up. I strongly suggest checking things ahead of time with software/simulations.

--
The suespammers.org mail server is located in California.  So are all my
other mailboxes.  Please do not send unsolicited bulk e-mail or unsolicited
 Click to see the full signature
Reply to
Hal Murray

Very neat, thank you Charles.

Reply to
Kris Neot

ElectronDepot website is not affiliated with any of the manufacturers or service providers discussed here. All logos and trade names are the property of their respective owners.