I need to interface some 12 and 24V signals to an FPGA/CPLD, it'll probably be one of the low end Spartans or Cyclones.
These are _very_ low bandwidth signals, 10's of hz at the most.
Because of the signal density, cost and restrictions of board space I am unable to implement any voltage regulation/clamping pre the FPGA inputs.
I am planning to using a very large in line resistor (100K ?) to limit current into the device pins.
I know that one of the recommended techniques for interfacing to
5V PCI signals is to use an in-line current limiting resistor. What I'm planning is an extension of this but I've previously always used quickswitches to clamp higher volates to safe limits and intuitively don't like applying these higher voltages to the pins.
probably. but the thing with the 'clamp diodes' is that they are not necessarily always enabled! and then the actual voltages on the io pad would rise well above 5V. So it makes sense to checkout if the clamp diodes are there when FPGA is not configured.
I have had some FPGA to get internal VCCINT short circuit an a board that had a few hundred ohms series resistor from an 5V RS232C driver IC to FPGA pin. I cant know that this was the reason for the FPGAs to burn, but I would be rather careful with the non-3.3V inputs (24V!) and series resistors.
Possibly, I can possibly negotiate a bit more space with my client if I can convince him it's going to make things more reliable.
We were trying to fit things into an enclosure bought off the shelf, but he's been enthusing about a custom enclosure manufacturer he went to see yesterday. If their quotes are reasonable I should be able to get a bit more space.
well in case the clamp diode can be specified with FPGA config settings, like PCI Clamp ON-OFF, then it obviously can not be permanently on. just make some experiments with large resistor, multimeter and adjustable power supply, while keeping the FPGA unconfigured.
if you can have some external zener or tvs its better of course solution
Oh, tell me about it. In a previous existence, that sort of thing was the bane of my life. Mind-numbingly simple stuff, but there's no well-integrated support for it; it costs space, components, PCB trackery, power supply fuss and bother, and all manner of general horribleness.
I would be very nervous of adding 100K-ish resistors in series with an FPGA input; the very slow rise times you would thus get sound to me like a recipe for nasty stuff to happen on the inputs. (Note to self: must check data sheet; how much hysteresis do they have on FPGA inputs these days?) Of course you will be applying all sorts of filtering, debouncing and other good stuff to the signals once inside the FPGA, but...
You can get clamp diode arrays in reasonably small packages; would that help?
That statement bothers me a little. If these are the usual 24V industrial sensor type inputs, then each input has a cost and space penalty associated with it (connectors, wiring, EMC filtering gubbins like clamp-on ferrites...) that vastly outweighs the cost and area of a couple of small SM components. I know that sometimes we poor electronics grunts are squeezed into absurdly tight spaces because "the electronics doesn't take up much room, does it?". But there's also the small matter that these
24V signals probably come from badly-shielded wiring that's spent most of its life in close proximity to a 5kW electric motor, or an arc welding set, or some other macho equipment. I used to reckon that effort spent on dealing with those risks in a paranoid way *always* paid for itself in reduced hassle later.
If your electrical environment is much kinder than I was used to, then please forgive my irrelevant ramblings.
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Made worse by the fact I work for/by myself so there's no one to talk this sort of stuff over with (that's where 'you lot' come in).
They are deliberately slugged and will have a couple of ms debouncing inside the FPGA as you've guessed. These could be reduced after initial system tests.
I think I've convinced myself that omitting some sort of voltage clamp will be a false economy, I'll look into the smallest/cheapest way of implementing it.
It should be a bit less noisy (hopefully), but you're right the filter/clamping is going in, reliability in service is important.
good points! if the inputs come from anywhere outside the closure then special care should be taken. this may be much more than the worry about the 3.3V inputs.
I had even more bad problem - a wire about 1.5Meter long carrying 12V signal switched with a relay was "just in the same cable bundle" as a wire going to the reset input of Atmel AVR.
and the result? the AVR microcontroller entered into a mode that allowed it to completly self erase itself - this is something Atmel claims not to be possible at all. Still it happened! Twice! The second time I asked someone else to verify my actions as I was testing the damaged silicon. The thing was inline flash programmer for Ericson mobile phone accessories (planned 500,000 yearly throughput). As project manager back then - brr, that explains why project managers are those who get gray hair!
so if you have the FPGA connected to some external cable-bundle carrying 24V switching signals, then well all your client setup may call for trouble. So be as paranoid as you can, as already suggested.
Hi Nial, If the signal goes from 0V to 24V and if you've got room for a resistor, you've probably got room for a diode. Point the sharp end at the 24V signal, the blunt end towards the FPGA. Turn on the FPGA pin's internal pullup resistor. Viola! HTH, Syms.
Perhaps an Ondes Nortenot is some sort of Theremin equivalent circuit? I'll get me coat...
BTW and while we're on the topics of bad jokes, I was reading on /. the other day about how some guys at Southampton Uni had made super fast bipolar transistors by doping them with fluorine. So guy wrote in suggesting that to make bipolar transistors better, they should be doped with lithium.
Ideally, you should use Schmitt pin option (if there is one ) If no schmitt option is available, be aware that transistion oscillations can occur, and they can do nasty things to the system reliability.
A single resistor will give you whatever threshold the device has, and that might be appx 1.2V : on a 24V signal, that's rather close to GND ?!
So, at the least a resistive divider is advisable, to shift that threshold to give you better noise immunity ( even 10Hz signals need a level margin )
Some devices have hot socketing, with optional clamp diodes. In those, you should enable the clamp diode.
Take care with the design to ensure solder splashes cannot drop the
I should add, that when you do use a divider, then over-drive of the pins 'goes away'. If you set the divider to give 3.3V Vih, then the threshold will be somewhere around 8V, which is a better sounding level.
ie Two resistors, appx 8:1, and no diodes needed. Use multipack resistors.
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