Hi
I implemented simple VHDL-written processing node (processor, BRAM, memory controller and network controller).
And I am trying to connect between 2 processing nodes in fpga, v2pro.
Two processors are directly communicated using handshaking protocol.
Problem is a clock.
When I use all the same clocks, then remote memory access is not okay, but local memory access is okay.
When I use different clocks (ie, processor and memory - negated clock each other), then remote memory access is okay, but local memory access is not okay.
Questions are
- Is it okay if we use all clocks the same? Then it will be globally/locally synchronous.
- If it is better to use globally asynchrous locally synchronous (GALS), how can we do that?
Thankyou for any comment and pointer