FX12 ethernet resource usage

Dec 18, 2006 4 Replies

Hi,



I'm working on a design with V4 FX12 and gigabit rgmii PHY.



To me it seemed obvious to use plb_temac and hard_temac (both come with EDK). A "small" implementation of these cores (DMA and checksum offload disabled) uses about 30% of the FX12 area.



For my design this is quite a lot, and I'd prefer to reduce the resource usage. At the moment, 100mbit support would be sufficient, as long as the board and PHY stay the same. I did not see any options to disable 10 or 1000 mbit support in the cores, so I suppose they don't let me save anything here.



Are there leaner alternatives to plb_temac that might work for me?



Regards, Marc



Hi,

I'm working on a design with V4 FX12 and gigabit rgmii PHY.

To me it seemed obvious to use plb_temac and hard_temac (both come with EDK). A "small" implementation of these cores (DMA and checksum offload disabled) uses about 30% of the FX12 area.

For my design this is quite a lot, and I'd prefer to reduce the resource usage. At the moment, 100mbit support would be sufficient, as long as the board and PHY stay the same. I did not see any options to disable 10 or 1000 mbit support in the cores, so I suppose they don't let me save anything here.

Are there leaner alternatives to plb_temac that might work for me?

Regards, Marc

Have a look at xapp807:

formatting link

Uses only a few slices, but you can't use any PLB or OPB components. But if all you need is Ethernet and nothing else from the PowerPC, this is probably thew way.

My email address is only valid until the end of the month. Go figure what the address is going to be after that...

plb_temac has a lot of configuration options that drastically affect the amount of resources required. If you can use fifo mode (instead of DMA mode) you will cut it in about half.

Also keep in mind that area usage is pretty meaningless until you fill the part. The tools will spread out the logic if the FPGA is sparesely utilized.

Ben Jackson AD7GD http://www.ben.com/

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