i am quite a newbie in FPGA development. my idea is build a SoC(System on Chip) which will be a Video/Audio player based on FPGA(Xilinx Spartan 3E 1M gate count). the video and audio decoders are Vorbis for audio and Theora for video and will be almost hardware based as posible. the desgin will have a Soft CPU for directing data from CF,reading the fs and then output a bitstream to decoders. the audio decoder will output all the data to a DAC(20bit or 24 bit for better quality). the video decoder will write to a RAM which will be the LCD framebuffer. the cpu also can write to the framebuffer but it will write over decoder data so i will have some kind of osd when the decoder is playing(like for remaining time,volume and other stuff).
from what i understand,doing a full ogg decoder on chip is madness so what i have to do i build coproccessors that will do most of clock-expensive and the software will use those coprocessors,right?
the storage will be a CF card which are damn cheap and can work as IDEs. the part i want to know if this is posible to be done in a FPGA.
i saw a guy that made a full Theora camera which use a encoder for super-high resolutions(1024x768@30FPS-->1280x1024@15FPS) on a Spartan2E which have a 300K gates.(that desgin is 96% of the FPGA,the article is in linuxdevices) so i guess a decoder that can decode 160x120-->640x480 @25FPS streams will be alot smaller and could fit into a FPGA.
i could move all the ogg vorbis decoder to a ASIC vorbis decoder(they exsist :) ) so saving the time about implenting the ogg vorbis format.
what you think,it is posible? which soft cpu(s) should i use,which things the cpu need to preform real fast? is it posible on a Spartan(development boards for spartan are damn cheap). if it is important to someone the desgin(the final one) will be powered with a LiPo battery :)
thx in advance