Well, I don't remember seeing anything on FCCM 2005 in this news group, and I just got this email today. Cheap seats end this Sunday Night.
I'll be there!
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C A L L F O R P A R T I C I P A T I O N
THE THIRTEENTH ANNUAL IEEE SYMPOSIUM ON FIELD PROGRAMMABLE CUSTOM COMPUTING MACHINES Napa, California April 17 - 20, 2005
Register now! The FCCM pre-registration deadline is Sunday, 20 March.
Advance registration will be accepted by mail, fax, or online submission through 20 March 2005. After 20 March, you must pay late registration fees. After 3 April only on-site registration will be accepted.
All no-show registrations will be billed in full. Students are required to show current picture ID cards at the time of registration.
To register, please visit the FCCM home page at
The registration application accepts MasterCard, Visa, American Express, and Diners Club cards. If you do not have one of these credit cards, or if you prefer not to register online, please print out the form and fax or mail with payment, to:
IEEE Computer Society ATTN: FCCM '05 Registration Dept. 6006 Washington, DC 20042-6006 (202) 371-0101 Phone (202) 728-0884 FAX
Sorry, no phone registrations. Please make checks payable to IEEE Computer Society.
Registrations received without payment will not be accepted.
Please remember to make hotel accomodations, too!
FCCM '05 Preliminary Program ________________________________________________________________
Sunday 17 April 2005 Registration and reception, 7:00pm -- 9:00pm ________________________________________________________________
Monday 18 April 2005
Session 1: Applications I
8:30 -- 10:00
Title: Efficient Hardware Data Mining with the Apriori Algorithm on FPGAs Authors: Zachary K. Baker, Viktor K. Prasanna Organization: University of Southern California
Title: A Novel 2D Filter Design Methodology for Heterogeneous Devices Authors: Christos-Savvas Bouganis, George A. Constantinides, Peter Y.K. Cheung Organization: Imperial College
Title: Prototyping Architectural Support for Program Rollback Using FPGAs Authors: Radu Teodorescu, Josep Torrellas Organization: UIUC ________________________________________________________________
Poster Session 1
10:00 -- 11:00 ________________________________________________________________
Session 2: Architecture
11:00 -- 12:00
Title: Register File Architecture Optimization in a Coarse-Grained Reconfigurable Architecture Authors: Zion Kwok, Steven J.E. Wilton Organization: University of British Columbia
Title: Handling Different Computational Granularity by a Reconfigurable IC featuring Embedded FPGAa and a Network-on-Chip Authors: Francesco Lertora, Michele Borgatti Organization: ST Microelectronics ________________________________________________________________
Session 3: Tools I
1:30 -- 3:00
Title: A Study of the Scalability of On-Chip Routing for Just-in-Time FPGA Compilation Authors: Roman Lysecky, Frank Vahid, Sheldon X.-D. Tan Organization: University of California, Riverside
Title: Simplifying the Integration of Processing Elements in Computing Systems using a Programmable Controller Authors: Lesley Shannon, Paul Chow Organization: University of Toronto
Title: Evaluation of Code Generation Strategies for Scalar Replaced Codes in Fine-Grain Configurable Architectures Authors: Pedro C. Diniz Organization: University of Southern California/ISI
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Poster Session 2
3:00 -- 4:00 ________________________________________________________________
Session 4: Graphics
4:00 -- 5:00
Title: FPGA Particle Graphics Hardware Authors: John S. Beeckler, Warren J. Gross Organization: McGill University
Title: Reconfigurable Designs for Radiosity Authors: Paul Baker, Tim Todman, Henry Styles, Wayne Luk Organization: Imperial College
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Demo Night
7:00 -- 9:00 ________________________________________________________________
Tuesday 19 April 2005
Session 5: Applications II
8:30 -- 10:00
Title: Hardware Factorization Based on Elliptic Curve Method Authors: Martin Simka, **Jan Pelzl, ***Thorsten Kleinjung, Milos Drutarovsky, ****Viktor Fischer, **Christof Paar Organization: Technical University of Kosice, Ruhr University**, University of Bonn***, Universite Jean Monnet****
Title: Metropolitan Road Traffic Simulation on FPGAs Authors: Justin L. Tripp, Henning S. Mortveit, Anders A. Hansson, Maya Gokhale Organization: Los Alamos National Laboratories
Title: Time Domain Numerical Simulation for Transient Wave Equations on Reconfigurable Coprocessor Platform Authors: Chuan He, Wei Zhao, Mi Lu Organization: Texas A&M University
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Poster Session 3
10:00 -- 11:00 ________________________________________________________________
Session 6: Run Time
11:00 -- 12:00
Title: COMA: A COoperative MAnagement Scheme for Energy Efficient Implementation of Real-Time Operating Systems on FPGA Based Soft Processors Authors: Jingzhao Ou, Viktor K. Prasanna Organization: University of Southern California
Title: An Execution Environment for Reconfigurable Computing Authors: W. Fu, K. Compton Organization: University of Wisconsin at Madison ________________________________________________________________
Session 7: Arithmetic
1:30 -- 3:00
Title: Higher Radix Floating-Point Representations for FPGA-Based Arithmetic Authors: Bryan Catanzaro, Brent Nelson Organization: Brigham Young University
Title: An Analysis of the Double-Precision Floating-Point FFT on FPGAs Authors: K. Scott Hemmert, Keith Underwood Organization: Sandia National Laboratories
Title: A Comparision of Floating Point and Logarithmic Number Systems for FPGAs Authors: Michael Haselman, Michael Beauchamp, Aaron Wood, Scott Hauck, *Keith Underwood, *K. Scott Hemmert Organization: University of Washington, Sandia National Laboratories* ________________________________________________________________
Poster Session 4
3:00 -- 4:00 ________________________________________________________________
Session 8: Device Architecture
4:00 -- 5:00
Title: Terrestrial-Based Radiation: A Cautionary Tale Authors: Heather Quinn, Paul Graham Organization: Los Alamos National Laboratory
Title: Automating the Layout of Reconfigurable Subsystems using Circuit Generators Authors: Shawn Phillips, Scott Hauck Organization: University of Washington
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Wednesday 20 April 2005
Session 9: Networking
8:30 -- 10:00
Title: Fast Reconfiguring Deep Packet Filter for 1+ Gigabit Network Authors: Young H. Cho, William H. Mangione-Smith Organization: UCLA
Title: A Framework For Rule Processing in Reconfigurable Network Systems Authors: Michael E. Attig, John W. Lockwood Organization: Washington University in St. Louis
Title: A Signature Match Processor Architecture for Network Intrusion Detection Authors: Janardham Singaraju, Long Bu, John A. Chandy Organization: University of Connecticut
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Session 10: Tools II
10:30 -- 11:30
Title: Interleaving Behavioral and Cycle- Accurate Descriptions for Reconfigurable Hardware Compilation Authors: Jose Gabriel F. Coutinho, Jun Jiang, Wayne Luk Organization: Imperial College
Title: Modeling and FPGA Implementation of Applications using Parameterized Process Networks with Non-Static Parameters Authors: Hristo Nikolov, Todor Stefanov, Ed Deprettere Organization: Leiden University
Philip Freidin Fliptronics