dynamic size of ports

Hi all!

I have a problem that someone here might have the answer to. I have a divider that takes inputs of 13 and 12 bits, and produces an output of

12 bits. I have a component to strip away the redundant bits from the divider, if the result of the division is, say an int value of 6, I don't want to use all 12 bits. This circuit is a part of an MPEG-4 device, a quantizer, so I want to compress as much as possible. My question is then, how do I declare the ports on the component that strips away the bits to output an std_logic_vector that is not fixed in size, but dynamic? This must be synthesizable. Guess there are many ways of doing this, and I hope someone has got an answer to me.

Thanks,

Dan Nilsen

Reply to
Dan Nilsen
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just another guy that come from software...

"Dan Nilsen" a écrit dans le message de news: snipped-for-privacy@posting.google.com...

Reply to
KCL

If the biggest answer available is 12-bits that's the resource you need to reserve in the FPGA.

I don't think you can dynamically change the output port size without reconfiguring the FPGA. It wouldn't make sense if you could, you need to hardwire the max ouptut size.

You could make the output port variable by using a reconfigurable computing algorithm and an external processor, but your process time is going to increase considerably.

Are you size constrained? Is that why you are trying to optimize the VHDL code?

Eric

Reply to
Eric

Hello,

Thanks for the responses.

The reason I need to do it is because I get a (signed) quotient from a divider in a range I already know. I divide a 8x8 DCT by 1 out of 2 preset Quantization matrices, which in turn are scaled by an integer ranging from 1-32. Sometimes I will get a 0 from the divider, during this case I don't want to transmit "too many" bits. I do however realise that this might be impossible, but I appreciate answers given me here.

Thanks,

Dan

Reply to
Dan Nilsen

Your port is a bunch of wires that represent your results. If you want to transmit the result in one clock cycle and you have 4096 different results from your 12-bit divider there is no way you can get along with less than 12 bits, you need them to distinguish the different results. In that case a 0 bit is not unused: It is used to tell the receiver that it is not 1.

If you know in advance that ALL your results are allways less than 2**N you can get along with less bits. To be exact: If you know that you will have less than 2**N different results you can get along with N bits, no matter how large the results are.

Kolja Sulimma

Dan Nilsen wrote:

Reply to
Kolja Sulimma

I think you will find the step following quantization actually performs the compression. Quantization just prepares the values so they compress well (loads of zeroes). Something like the huffman and run length encoding algorithms will take the quantized values and express them concisely (compress them).

Reply to
Irwin Kennedy

I'm not implementing RLE or Huffman in this project, but I'm aware that this is where much of the compression do take place. I will as I said, get lots of 0's and this can be compressed further. It might be the next step, but it is out of scope for my undergrad. engineering project.

Thanks to all for their contributions anyway!

Dan

Reply to
Dan Nilsen

Could you declare another "mask" slv that validates the divider result slv?

Dan Nilsen wrote:

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Reply to
Dal

Hi Dan, first thing to do: Think of the hardware you want to create.

A device with 12 output lines always ever has these wires. There is no magical monkey inside the chip, riping off unused wires and reconnecting them as needed. It's HARD-ware!

But then... If you want to transmit the data, you can do it in some serialized manner. With the help uf some useful algorithm or even a simple dataformat (e.g. Datalength(4bits), Data (0 to 12 bits variable)). (well, an dataformatter also has some kind of algorithm inside..)

In the end you see that compression only works by serialisation. Otherwise you always have to keep your wires with you all the way.

Have a nice synthesis eilert

Dan Nilsen schrieb:

Reply to
backhus

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