Hi!
For a small project running Linux on a Virtex2pro, I need to write an IP-component, that recive data from portpins and can transfer data to RAM directly. I'm tring to understand DMA, generated by Xilinx EDK (8.2) wizzard. I think, I've understand some basics. Afer writing the datalength in the register, the transfer will begin. Correct? Writing datalength, source- and destinationaddress is done by the driver? But how cat I write data from the user_logic to the memory?