Hi everyone, I want to design a model with my Smt338. This is a Sundance board with a Virtex IIPro30 ff896-6 and a Micron MT46V16M16 as DDR memory. First of all I need to implement the hardware architecture, so I use edk 8.1 (or edk 8.2) to create a model with PowerPC and this DDR memory. In the ucf I map every port, but I have not any pin to DDR_CLK, that is, the feedback ddr clock.
This is the loc entry: Net fpga_0_GEN_DDR_CLK_FB LOC=;
What can I do?. Perhaps I could use a DCM_module but I don't know how could I implement it.
Regards