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Checksums

hi all, Im working on a project in FPGAs called "network Traffic Manager" in verilog implemented in virtex 4. Im using trimode ethernet MAC core in it. Now i have to send a packet via ethernet to the other machine and recalculate the checksum. For that i have to first calculate the cheksum. Now the problem is that im a bit confused as to which algorithm should I use to calculate the cheksum. I started to work on TCP/IP checksum algo but now im totally confused b/w TCP/IP checksum and CRC. So can anyone tell me which algo shud i use?

plz reply asap thank u Regards Ambreen Ashfaq

Reply to
Ambreen Ashfaq Afridi
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just for information: TCP/IP chksum calculates chksum on psuedo header which includes some fields from ip and some from TCP ip source add ip destination add tcp length tcp protocol number etc

Reply to
Ambreen Ashfaq Afridi

If CRC is confusing you, why not taking even parity over the whole word?

bye Thomas

Reply to
Thomas Stanka

Thanks everyone. Now the issue is that how will i extract tcp and IP information from the ethernet frame? What libraries would i include while coding it in verilog?

Reply to
Ambreen Ashfaq Afridi

A little more detail would help. I would say you could extract UDP with a fairly simple state machine, but would want a real CPU of some kind for TCP. TCP has to be able to put the stream back together even when the data arrives out of order. (Technically you need to do fragment reassembly for IP, but maybe you can get out of that one.) TCP also needs to ACK for what has arrived, deal with multiple copies of data, and even more.

Use UDP if you can.

-- glen

Reply to
glen herrmannsfeldt

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