Hi Comrade,
I run into troubles trying to read anything using ICAP.
I set "-g security:none", just in case.
When I try to read for example STAT Register, BUSY goes HIGH when I switch to reading and stays that way. I deselect device (i.e. assert CE to HIGH) first then toggle WRITE.
Output O[7:0] is set to X"9F", all the time.
What may be the reason, any guesses?
What am I missing?
Cheers, [g.d.]
g.d.
ICAp is nothing but a simple 2:1 multiplexer which provides internal access to all those "normal" external configuration interface pins.
It sounds like PROG is being pulled internally, which causes the device to lose configuration, or something simple like that.
After instantiating the ICAP primitive, be sure that all the connections you make to it have the same logical function as you would do externally on the same pins.
In fact, debugging can be done by doing whatever it is, externally, and then putting it back inside (if you get really desperate).
Be sure to go over all the configuration signals, and their use, in the User's configuration guide for your part.
Austin
Hi g.d.
looks like you're triggering a "SelectMap abort sequence" when switching from read to write. Consult the User Guide on how to avoid this, i guess your CS handling is not correct.
Jens
Thanks guys,
I think, I got it under control. The thing was the Virtex-5 is bit swaped within the byte, and another thing was misleadding drawing in Xilinx user "guide" (i.e. Figure 7-2: SelectMAP Status Register Read - UG191 Virtex-5 FPGA Configuration User Guide available at Xilinx site), while I was deperate enough to double cclk rate per single data word.
Now it responds, and the story begins ;-)
-- Cheers, [g.d.]
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