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10G serial port with no FEC?

Hi,

Recently I noticed that Xilinx FPGA has RocketPHY 10Gbps serial interfaces using 64B66B encoding. However, it seems to have no FEC built in the hardware. Is this a problem? At 10Gbps, the channel won't be clean. There has to be some FEC one way or the other.

Can we really let go FEC at 10Gbps (e.g. relying on DFE) ? Or perhaps user needs to build their own FEC in the FPGA to use it along? Anyone had experience on this?

In addition, any other FPGA vendor having 10Gbps serial port FPGA chips?

thanks,

-- Francis

Reply to
francisontheweb
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Howdy Francis,

Why won't it be clean, and why do you feel there must be FEC? While OC-192 has the option for FEC, it isn't required. Same for 10 Gbps Ethernet.

Yes - many applications do so. I assume DFE stands for decision feedback equalizer? If so, I think it's a safe bet that many (most? or possibly all?) 10 Gbps receivers have some sort of equalization.

I'm certain it could be done, if your application needed the extra coding gain.

No, not yet. Several others provide bonding of four 3.125 Gbps channels to get you the effective rate in excess of 10 Gbps.

Have fun,

Marc

Reply to
Marc Randolph

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